[llvm] b432f80 - [ARM] Update ror.ll test to canonicalized IR

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-05-07T17:23:42+01:00
New Revision: b432f80e48a005b47cee7bb86bc9ec9cc861b705

URL: https://github.com/llvm/llvm-project/commit/b432f80e48a005b47cee7bb86bc9ec9cc861b705
DIFF: https://github.com/llvm/llvm-project/commit/b432f80e48a005b47cee7bb86bc9ec9cc861b705.diff

LOG: [ARM] Update ror.ll test to canonicalized IR

As discussed on D124839, we're almost certainly only ever going to see this from IR directly - which now will create funnel shift intrinsics directly

I've also added a couple of rotl(rotr()) tests to check left/right rotation merging.

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/ror.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/ARM/ror.ll b/llvm/test/CodeGen/ARM/ror.ll
index 7a8c5fd1e0c0b..f7e241ddb8307 100644
--- a/llvm/test/CodeGen/ARM/ror.ll
+++ b/llvm/test/CodeGen/ARM/ror.ll
@@ -8,16 +8,24 @@ define i32 @test1(i32 %x) nounwind readnone {
 ; CHECK-NEXT:    ror r0, r0, #10
 ; CHECK-NEXT:    bx lr
 entry:
-  %high_part.i = shl i32 %x, 28
-  %low_part.i = lshr i32 %x, 4
-  %result.i = or i32 %high_part.i, %low_part.i
-  %high_part.i.1 = shl i32 %result.i, 26
-  %low_part.i.2 = lshr i32 %result.i, 6
-  %result.i.3 = or i32 %low_part.i.2, %high_part.i.1
+  %result.i = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 4)
+  %result.i.3 = call i32 @llvm.fshr.i32(i32 %result.i, i32 %result.i, i32 6)
   ret i32 %result.i.3
 }
 
-; the same vector test
+; rotl (rotr x, 4), 6 -> rotl x, 2 -> ror r0, r0, #30
+define i32 @test1_alt(i32 %x) nounwind readnone {
+; CHECK-LABEL: test1_alt:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    ror r0, r0, #30
+; CHECK-NEXT:    bx lr
+entry:
+  %result.i = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 4)
+  %result.i.3 = call i32 @llvm.fshl.i32(i32 %result.i, i32 %result.i, i32 6)
+  ret i32 %result.i.3
+}
+
+; the same vector tests
 define <2 x i32> @test2(<2 x i32> %x) nounwind readnone {
 ; CHECK-LABEL: test2:
 ; CHECK:       @ %bb.0: @ %entry
@@ -25,12 +33,25 @@ define <2 x i32> @test2(<2 x i32> %x) nounwind readnone {
 ; CHECK-NEXT:    ror r1, r1, #10
 ; CHECK-NEXT:    bx lr
 entry:
-  %high_part.i = shl <2 x i32> %x, <i32 28, i32 28>
-  %low_part.i = lshr <2 x i32> %x, <i32 4, i32 4>
-  %result.i = or <2 x i32> %high_part.i, %low_part.i
-  %high_part.i.1 = shl <2 x i32> %result.i, <i32 26, i32 26>
-  %low_part.i.2 = lshr <2 x i32> %result.i, <i32 6, i32 6>
-  %result.i.3 = or <2 x i32> %low_part.i.2, %high_part.i.1
+  %result.i = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 4, i32 4>)
+  %result.i.3 = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %result.i, <2 x i32> %result.i, <2 x i32> <i32 6, i32 6>)
   ret <2 x i32> %result.i.3
 }
 
+define <2 x i32> @test2_alt(<2 x i32> %x) nounwind readnone {
+; CHECK-LABEL: test2_alt:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    ror r0, r0, #30
+; CHECK-NEXT:    ror r1, r1, #30
+; CHECK-NEXT:    bx lr
+entry:
+  %result.i = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 4, i32 4>)
+  %result.i.3 = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %result.i, <2 x i32> %result.i, <2 x i32> <i32 6, i32 6>)
+  ret <2 x i32> %result.i.3
+}
+
+declare i32 @llvm.fshl.i32(i32, i32, i32)
+declare i32 @llvm.fshr.i32(i32, i32, i32)
+
+declare <2 x i32> @llvm.fshl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
+declare <2 x i32> @llvm.fshr.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)