[PATCH] D122769: [RISCV] Add a prepass to vsetvli insertion to propagate VLMAX vsetvli to the instructions.

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

I played around with this a bit last night and realized you can achieve the same effect with a small change inside insertVSETVLI.  I also implemented a simple version of the post-pass, and getting that to cover your case of interest turns out to be difficult as you also need the cross block reasoning.

  @@ -682,6 +705,16 @@ void RISCVInsertVSETVLI::insertVSETVLI(MachineBasicBlock &MBB,
       return;
     }
   
  +  
  +  if (AVLReg.isVirtual()) {
  +    MachineInstr &DefMI = *MRI->getVRegDef(AVLReg);
  +    if (isVLMaxVSETVLI(DefMI)) {
  +      VSETVLIInfo DefInfo = getInfoForVSETVLI(DefMI);
  +      if (Info.hasSameVLMAX(DefInfo))
  +        AVLReg = RISCV::X0;
  +    }
  +  }
     if (AVLReg.isVirtual())
       MRI->constrainRegClass(AVLReg, &RISCV::GPRNoX0RegClass);
   


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122769/new/

https://reviews.llvm.org/D122769