[PATCH] D124836: [AArch64] Add support for -fzero-call-used-regs
Bill Wendling via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 7 03:37:51 PDT 2022
void added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:682
+ // The called routine is expected to preserve r19-r28
+ // r29 and r30 are used as frame pointer and link register resp.
+ return 0;
----------------
nickdesaulniers wrote:
> What happens if `-fomit-frame-pointer` is specified? Is X29 used as a GPR then?
GCC only clears registers R0-R18 with or without `-fomit-frame-pointer`. (That's using `-fzero-call-used-regs=all`, so register usage isn't a consideration.) I assume that it's correct, or at least close to it.
================
Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:752
+#undef CASE
+ }
+}
----------------
peterwaller-arm wrote:
> void wrote:
> > kristof.beyls wrote:
> > > Just a drive-by comment: I'm wondering if SVE registers should also be listed here?
> > I'm not familiar with the SVE registers (I assume you mean the `Z#` and `P#` ones). Could you give an example program?
> SVE is slightly tricker here because the set of registers the caller must preserve depends on the signature of the function.
>
> This is described here: https://github.com/ARM-software/abi-aa/blob/8a7b266879c60ca1c76e94ebb279b2dac60ed6a5/aapcs64/aapcs64.rst#613scalable-vector-registers
>
> The callee-preserved registers are z8-z23 and p4-p15 if the function is using the VARIANT_PCS, the code for that condition in the asm printer is here:
>
> https://github.com/llvm/llvm-project/blob/78fd413cf736953ac623cabf3d5f84c8219e31f8/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp#L864-L875
>
>
> ```
> if (MF->getFunction().getCallingConv() == CallingConv::AArch64_VectorCall ||
> MF->getFunction().getCallingConv() ==
> CallingConv::AArch64_SVE_VectorCall ||
> STI->getRegisterInfo()->hasSVEArgsOrReturn(MF)) {
> ```
>
> Hope that helps a little.
Okay, so GCC does clear out SVE registers when using `-march=armv8-a+sve`:
```
mov z0.h, #0
mov z1.h, #0
mov z2.h, #0
mov z3.h, #0
mov z4.h, #0
mov z5.h, #0
mov z6.h, #0
mov z7.h, #0
mov z16.h, #0
mov z17.h, #0
mov z18.h, #0
mov z19.h, #0
mov z20.h, #0
mov z21.h, #0
mov z22.h, #0
mov z23.h, #0
mov z24.h, #0
mov z25.h, #0
mov z26.h, #0
mov z27.h, #0
mov z28.h, #0
mov z29.h, #0
mov z30.h, #0
mov z31.h, #0
pfalse p0.b
pfalse p1.b
pfalse p2.b
pfalse p3.b
pfalse p4.b
pfalse p5.b
pfalse p6.b
pfalse p7.b
pfalse p8.b
pfalse p9.b
pfalse p10.b
pfalse p11.b
pfalse p12.b
pfalse p13.b
pfalse p14.b
pfalse p15.b
```
Repository:
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https://reviews.llvm.org/D124836/new/
https://reviews.llvm.org/D124836
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