[PATCH] D113897: [GVNSink] Make GVNSink resistant against self referencing instructions (PR36954)
Dawid Jurczak via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 7 03:14:57 PDT 2022
yurai007 updated this revision to Diff 427838.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113897/new/
https://reviews.llvm.org/D113897
Files:
llvm/lib/Transforms/Scalar/GVNSink.cpp
llvm/test/Transforms/GVNSink/sink-common-code.ll
Index: llvm/test/Transforms/GVNSink/sink-common-code.ll
===================================================================
--- llvm/test/Transforms/GVNSink/sink-common-code.ll
+++ llvm/test/Transforms/GVNSink/sink-common-code.ll
@@ -759,6 +759,43 @@
ret i32 1
}
+ at 0 = global i32 0, align 4
+ at 1 = global i8 0, align 2
+
+; CHECK-LABEL: test_pr36954
+; CHECK-NOT: xor
+; PR36954 reproducer containing self referencing instruction shouldn't crash GVNSink pass.
+define void @test_pr36954() {
+bb1:
+ %i1 = load i32, i32* @0, align 4
+ %i2 = trunc i32 %i1 to i8
+ br label %bb2
+
+bb2:
+ %i3 = phi i32 [ 0, %bb1 ], [ %i10, %bb5 ]
+ %i4 = icmp eq i32 %i3, 0
+ br i1 %i4, label %bb5, label %exit
+
+bb3:
+ br i1 %i4, label %bb5, label %bb4
+
+bb4:
+ %i5 = load i8, i8* @1, align 2
+ %i6 = sub i8 %i2, %i5
+ store i8 %i6, i8* @1, align 2
+ %i7 = zext i8 %i6 to i32
+ %i8 = xor i32 %i8, %i7
+ %i9 = icmp eq i32 %i8, 0
+ br i1 %i9, label %exit, label %bb3
+
+bb5:
+ %i10 = phi i32 [ %i3, %bb2 ], [ %i8, %bb3 ]
+ br label %bb2
+
+exit:
+ ret void
+}
+
; CHECK: !0 = !{!1, !1, i64 0}
; CHECK: !1 = !{!"float", !2}
; CHECK: !2 = !{!"an example type tree"}
Index: llvm/lib/Transforms/Scalar/GVNSink.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/GVNSink.cpp
+++ llvm/lib/Transforms/Scalar/GVNSink.cpp
@@ -381,6 +381,8 @@
}
};
+using BasicBlocksSet = SmallPtrSet<const BasicBlock *, 32>;
+
class ValueTable {
DenseMap<Value *, uint32_t> ValueNumbering;
DenseMap<GVNExpression::Expression *, uint32_t> ExpressionNumbering;
@@ -388,6 +390,7 @@
BumpPtrAllocator Allocator;
ArrayRecycler<Value *> Recycler;
uint32_t nextValueNumber = 1;
+ BasicBlocksSet ReachableBBs;
/// Create an expression for I based on its opcode and its uses. If I
/// touches or reads memory, the expression is also based upon its memory
@@ -419,6 +422,11 @@
public:
ValueTable() = default;
+ /// Set basic blocks reachable from entry block.
+ void setReachableBBs(const BasicBlocksSet &ReachableBBs) {
+ this->ReachableBBs = ReachableBBs;
+ }
+
/// Returns the value number for the specified value, assigning
/// it a new number if it did not have one before.
uint32_t lookupOrAdd(Value *V) {
@@ -432,6 +440,9 @@
}
Instruction *I = cast<Instruction>(V);
+ if (!ReachableBBs.contains(I->getParent()))
+ return ~0U;
+
InstructionUseExpr *exp = nullptr;
switch (I->getOpcode()) {
case Instruction::Load:
@@ -568,6 +579,7 @@
unsigned NumSunk = 0;
ReversePostOrderTraversal<Function*> RPOT(&F);
+ VN.setReachableBBs(BasicBlocksSet(RPOT.begin(), RPOT.end()));
for (auto *N : RPOT)
NumSunk += sinkBB(N);
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D113897.427838.patch
Type: text/x-patch
Size: 2753 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220507/f3f26035/attachment.bin>
More information about the llvm-commits
mailing list