[PATCH] D125117: [AMDGPU][GFX10] Support base+soffset+offset SMEM loads.
Ivan Kosarev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 6 12:04:09 PDT 2022
kosarev added inline comments.
================
Comment at: llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt:11357
-# GFX10: s_buffer_load_dword s5, s[4:7], 0x0 ; encoding: [0x42,0x01,0x20,0xf4,0x00,0x00,0x00,0xfa]
+# GFX10: s_buffer_load_dword s5, s[4:7], null ; encoding: [0x42,0x01,0x20,0xf4,0x00,0x00,0x00,0xfa]
0x42,0x01,0x20,0xf4,0x00,0x00,0x00,0xfa
----------------
SP3 actually decodes these to the form with `null`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125117/new/
https://reviews.llvm.org/D125117
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