[llvm] 2ca78d2 - [SelectionDAG] Improve asserts in SelectionDAG::getSelect.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-05-06T09:41:11-07:00
New Revision: 2ca78d2bdfaf14e0cfd20dfa5ee53c6d12643e07

URL: https://github.com/llvm/llvm-project/commit/2ca78d2bdfaf14e0cfd20dfa5ee53c6d12643e07
DIFF: https://github.com/llvm/llvm-project/commit/2ca78d2bdfaf14e0cfd20dfa5ee53c6d12643e07.diff

LOG: [SelectionDAG] Improve asserts in SelectionDAG::getSelect.

The VT passed in must match the type of LHS and RHS.
Previously we only checked that the vectorness matched.

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/SelectionDAG.h

Removed: 
    


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diff  --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h
index bf21a0bed8300..6d5f6c8b50c3e 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -1103,10 +1103,8 @@ class SelectionDAG {
   /// operands and don't want to check for vector.
   SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS,
                     SDValue RHS) {
-    assert(LHS.getValueType() == RHS.getValueType() &&
+    assert(LHS.getValueType() == VT && RHS.getValueType() == VT &&
            "Cannot use select on 
diff ering types");
-    assert(VT.isVector() == LHS.getValueType().isVector() &&
-           "Cannot mix vectors and scalars");
     auto Opcode = Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT;
     return getNode(Opcode, DL, VT, Cond, LHS, RHS);
   }