[PATCH] D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

Here (https://reviews.llvm.org/D125035) is the assertion I mentioned above as a flag we can use for testing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125021/new/

https://reviews.llvm.org/D125021