[PATCH] D124961: [riscv] Use X0 for destination of VSETVLI instruction if result unused

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:1224
+    // through to check for VSETVLIs which write to an unused destination.
+    // For the non X0, X0 variant, we can replace the destination register
+    // with X0 to reduce register pressure.  This is really a generic
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I know we have `PseudoVSETVLIX0`, but is it really an invariant that `PseudoVSETVLI` //never// has `X0, X0` at this stage? Should we maybe add an assert to be a bit more sure? If for whatever reason we do have `X0, X0` this would (subtly) generate some wrong code.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124961/new/

https://reviews.llvm.org/D124961