[PATCH] D123801: [DAG][PowerPC] Combine shuffle(bitcast(X), Mask) to bitcast(shuffle(X, Mask'))
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 5 00:11:17 PDT 2022
dmgreen added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9878
const SDValue *InputLoad = getNormalLoadInput(V1, IsPermutedLoad);
- if (InputLoad && Subtarget.hasVSX() && V2.isUndef() &&
- (PPC::isSplatShuffleMask(SVOp, 4) || PPC::isSplatShuffleMask(SVOp, 8)) &&
+ auto isSplatShuffle = [](ShuffleVectorSDNode *SVOp) {
+ if (SVOp->getValueType(0).getVectorNumElements() == 2)
----------------
shchenz wrote:
> Can we integrate splat load check for 2 elements to `isSplatShuffleMask()` and `getSplatIdxForPPCMnemonics()`?
Yeah I think I can make that work. It is used in more places, but it shouldn't be an issue if they are only handling v16i8 types.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123801/new/
https://reviews.llvm.org/D123801
More information about the llvm-commits
mailing list