[PATCH] D124986: [RISCV] Support VP_REDUCE_ADD mask operation

[WangLian via Phabricator via llvm-commits]

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Support VP_REDUCE_ADD mask operation, turn it to VP_REDUCE_XOR in getNode.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D124986

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll

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