[PATCH] D124903: [X86][AMX] Replace PXOR instruction with SET0 in AMX pre config.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 4 18:55:28 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/X86/AMX/amx-config.ll:11
 ; Function Attrs: nounwind uwtable
-define dso_local void @test_api(i32 %0, i16 signext %1, i16 signext %2) {
+define <4 x i32> @test_api(i32 %0, i16 signext %1, i16 signext %2, <4 x i32> %xmm0) {
 ; AVX512-LABEL: test_api:
----------------
LuoYuanke wrote:
> craig.topper wrote:
> > craig.topper wrote:
> > > LuoYuanke wrote:
> > > > xiangzhangllvm wrote:
> > > > > Why change the void to return parameter %xmm0,I didn't see %xmm0 join any calculation.
> > > > Because we want register other than xmm0 is allocated to V_SET0. I think it is to test if there is some potential issue in register allocation. @craig.topper, am I right?
> > > > 
> > > If you run this modified test without this patch, does it show the bug?
> > I guess not because you're doing this after the Two Address Instruction Pass runs and you've left SSA?
> This pass runs before Two Address Instruction Pass. It is in SSA form.
My mistake, I guess it worked because the same vreg was used for src and dest even though we're in SSA form. Is that allowed because it is undef?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124903/new/

https://reviews.llvm.org/D124903



More information about the llvm-commits mailing list