[PATCH] D124961: [riscv] Use X0 for destination of VSETVLI instruction if result unused
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 4 14:21:39 PDT 2022
reames updated this revision to Diff 427137.
reames added a comment.
Add VSETIVLI
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124961/new/
https://reviews.llvm.org/D124961
Files:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
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