[PATCH] D124894: Prefer 32bit and 64bit switch conditions for x86
Matthias Braun via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 4 12:46:38 PDT 2022
MatzeB added inline comments.
================
Comment at: llvm/lib/CodeGen/TargetLoweringBase.cpp:1614
+ EVT OldVT = getValueType(DL, CondType);
+ MVT RegType = getRegisterType(Context, OldVT);
+ unsigned RegWidth = RegType.getSizeInBits();
----------------
craig.topper wrote:
> If we just gave targets control over RegType here would that be enough?
The callback is used by `CodeGenPrepare` though which deals with llvm IR and rather has `Type*`s than `MVT`s...
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124894/new/
https://reviews.llvm.org/D124894
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