[llvm] dc1abb7 - [X86] const-shift-of-constmasked.ll - replace X32 check prefix with X86
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue May 3 07:28:57 PDT 2022
Author: Simon Pilgrim
Date: 2022-05-03T15:28:46+01:00
New Revision: dc1abb777a806488ed78dabdae10cf9534701c4f
URL: https://github.com/llvm/llvm-project/commit/dc1abb777a806488ed78dabdae10cf9534701c4f
DIFF: https://github.com/llvm/llvm-project/commit/dc1abb777a806488ed78dabdae10cf9534701c4f.diff
LOG: [X86] const-shift-of-constmasked.ll - replace X32 check prefix with X86
We try to only use X32 for gnux32 triple tests
Added:
Modified:
llvm/test/CodeGen/X86/const-shift-of-constmasked.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/const-shift-of-constmasked.ll b/llvm/test/CodeGen/X86/const-shift-of-constmasked.ll
index d081a2e4a3fa3..d04819a526bae 100644
--- a/llvm/test/CodeGen/X86/const-shift-of-constmasked.ll
+++ b/llvm/test/CodeGen/X86/const-shift-of-constmasked.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; The mask is all-ones, potentially shifted.
@@ -11,12 +11,12 @@
; lshr
define i8 @test_i8_7_mask_lshr_1(i8 %a0) {
-; X32-LABEL: test_i8_7_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $6, %al
-; X32-NEXT: shrb %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_7_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $6, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_7_mask_lshr_1:
; X64: # %bb.0:
@@ -31,12 +31,12 @@ define i8 @test_i8_7_mask_lshr_1(i8 %a0) {
}
define i8 @test_i8_28_mask_lshr_1(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: shrb %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_lshr_1:
; X64: # %bb.0:
@@ -50,12 +50,12 @@ define i8 @test_i8_28_mask_lshr_1(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_lshr_2(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_lshr_2:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: shrb $2, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_lshr_2:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: shrb $2, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_lshr_2:
; X64: # %bb.0:
@@ -69,12 +69,12 @@ define i8 @test_i8_28_mask_lshr_2(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_lshr_3(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_lshr_3:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $24, %al
-; X32-NEXT: shrb $3, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_lshr_3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $24, %al
+; X86-NEXT: shrb $3, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_lshr_3:
; X64: # %bb.0:
@@ -88,12 +88,12 @@ define i8 @test_i8_28_mask_lshr_3(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_lshr_4(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_lshr_4:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $16, %al
-; X32-NEXT: shrb $4, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_lshr_4:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $16, %al
+; X86-NEXT: shrb $4, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_lshr_4:
; X64: # %bb.0:
@@ -108,12 +108,12 @@ define i8 @test_i8_28_mask_lshr_4(i8 %a0) {
}
define i8 @test_i8_224_mask_lshr_1(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $-32, %al
-; X32-NEXT: shrb %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $-32, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_lshr_1:
; X64: # %bb.0:
@@ -127,12 +127,12 @@ define i8 @test_i8_224_mask_lshr_1(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_224_mask_lshr_4(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_lshr_4:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $-32, %al
-; X32-NEXT: shrb $4, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_lshr_4:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $-32, %al
+; X86-NEXT: shrb $4, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_lshr_4:
; X64: # %bb.0:
@@ -146,11 +146,11 @@ define i8 @test_i8_224_mask_lshr_4(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_224_mask_lshr_5(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_lshr_5:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: shrb $5, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_lshr_5:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: shrb $5, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_lshr_5:
; X64: # %bb.0:
@@ -163,11 +163,11 @@ define i8 @test_i8_224_mask_lshr_5(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_224_mask_lshr_6(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_lshr_6:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: shrb $6, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_lshr_6:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: shrb $6, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_lshr_6:
; X64: # %bb.0:
@@ -183,12 +183,12 @@ define i8 @test_i8_224_mask_lshr_6(i8 %a0) {
; ashr
define i8 @test_i8_7_mask_ashr_1(i8 %a0) {
-; X32-LABEL: test_i8_7_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $6, %al
-; X32-NEXT: shrb %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_7_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $6, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_7_mask_ashr_1:
; X64: # %bb.0:
@@ -203,12 +203,12 @@ define i8 @test_i8_7_mask_ashr_1(i8 %a0) {
}
define i8 @test_i8_28_mask_ashr_1(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: shrb %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_ashr_1:
; X64: # %bb.0:
@@ -222,12 +222,12 @@ define i8 @test_i8_28_mask_ashr_1(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_ashr_2(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_ashr_2:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: shrb $2, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_ashr_2:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: shrb $2, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_ashr_2:
; X64: # %bb.0:
@@ -241,12 +241,12 @@ define i8 @test_i8_28_mask_ashr_2(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_ashr_3(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_ashr_3:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $24, %al
-; X32-NEXT: shrb $3, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_ashr_3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $24, %al
+; X86-NEXT: shrb $3, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_ashr_3:
; X64: # %bb.0:
@@ -260,12 +260,12 @@ define i8 @test_i8_28_mask_ashr_3(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_ashr_4(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_ashr_4:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $16, %al
-; X32-NEXT: shrb $4, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_ashr_4:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $16, %al
+; X86-NEXT: shrb $4, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_ashr_4:
; X64: # %bb.0:
@@ -280,12 +280,12 @@ define i8 @test_i8_28_mask_ashr_4(i8 %a0) {
}
define i8 @test_i8_224_mask_ashr_1(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $-32, %al
-; X32-NEXT: sarb %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $-32, %al
+; X86-NEXT: sarb %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_ashr_1:
; X64: # %bb.0:
@@ -299,12 +299,12 @@ define i8 @test_i8_224_mask_ashr_1(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_224_mask_ashr_4(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_ashr_4:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $-32, %al
-; X32-NEXT: sarb $4, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_ashr_4:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $-32, %al
+; X86-NEXT: sarb $4, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_ashr_4:
; X64: # %bb.0:
@@ -318,11 +318,11 @@ define i8 @test_i8_224_mask_ashr_4(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_224_mask_ashr_5(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_ashr_5:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: sarb $5, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_ashr_5:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: sarb $5, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_ashr_5:
; X64: # %bb.0:
@@ -335,11 +335,11 @@ define i8 @test_i8_224_mask_ashr_5(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_224_mask_ashr_6(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_ashr_6:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: sarb $6, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_ashr_6:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: sarb $6, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_ashr_6:
; X64: # %bb.0:
@@ -355,12 +355,12 @@ define i8 @test_i8_224_mask_ashr_6(i8 %a0) {
; shl
define i8 @test_i8_7_mask_shl_1(i8 %a0) {
-; X32-LABEL: test_i8_7_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $7, %al
-; X32-NEXT: addb %al, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_7_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $7, %al
+; X86-NEXT: addb %al, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_7_mask_shl_1:
; X64: # %bb.0:
@@ -374,12 +374,12 @@ define i8 @test_i8_7_mask_shl_1(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_7_mask_shl_4(i8 %a0) {
-; X32-LABEL: test_i8_7_mask_shl_4:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $7, %al
-; X32-NEXT: shlb $4, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_7_mask_shl_4:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $7, %al
+; X86-NEXT: shlb $4, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_7_mask_shl_4:
; X64: # %bb.0:
@@ -393,11 +393,11 @@ define i8 @test_i8_7_mask_shl_4(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_7_mask_shl_5(i8 %a0) {
-; X32-LABEL: test_i8_7_mask_shl_5:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: shlb $5, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_7_mask_shl_5:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: shlb $5, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_7_mask_shl_5:
; X64: # %bb.0:
@@ -410,11 +410,11 @@ define i8 @test_i8_7_mask_shl_5(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_7_mask_shl_6(i8 %a0) {
-; X32-LABEL: test_i8_7_mask_shl_6:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: shlb $6, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_7_mask_shl_6:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: shlb $6, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_7_mask_shl_6:
; X64: # %bb.0:
@@ -428,12 +428,12 @@ define i8 @test_i8_7_mask_shl_6(i8 %a0) {
}
define i8 @test_i8_28_mask_shl_1(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: addb %al, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: addb %al, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_shl_1:
; X64: # %bb.0:
@@ -447,12 +447,12 @@ define i8 @test_i8_28_mask_shl_1(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_shl_2(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_shl_2:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: shlb $2, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_shl_2:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: shlb $2, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_shl_2:
; X64: # %bb.0:
@@ -466,12 +466,12 @@ define i8 @test_i8_28_mask_shl_2(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_shl_3(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_shl_3:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $28, %al
-; X32-NEXT: shlb $3, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_shl_3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $28, %al
+; X86-NEXT: shlb $3, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_shl_3:
; X64: # %bb.0:
@@ -485,12 +485,12 @@ define i8 @test_i8_28_mask_shl_3(i8 %a0) {
ret i8 %t1
}
define i8 @test_i8_28_mask_shl_4(i8 %a0) {
-; X32-LABEL: test_i8_28_mask_shl_4:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $12, %al
-; X32-NEXT: shlb $4, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_28_mask_shl_4:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $12, %al
+; X86-NEXT: shlb $4, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_28_mask_shl_4:
; X64: # %bb.0:
@@ -505,12 +505,12 @@ define i8 @test_i8_28_mask_shl_4(i8 %a0) {
}
define i8 @test_i8_224_mask_shl_1(i8 %a0) {
-; X32-LABEL: test_i8_224_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movb {{[0-9]+}}(%esp), %al
-; X32-NEXT: andb $96, %al
-; X32-NEXT: addb %al, %al
-; X32-NEXT: retl
+; X86-LABEL: test_i8_224_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: andb $96, %al
+; X86-NEXT: addb %al, %al
+; X86-NEXT: retl
;
; X64-LABEL: test_i8_224_mask_shl_1:
; X64: # %bb.0:
@@ -531,13 +531,13 @@ define i8 @test_i8_224_mask_shl_1(i8 %a0) {
; lshr
define i16 @test_i16_127_mask_lshr_1(i16 %a0) {
-; X32-LABEL: test_i16_127_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $126, %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_127_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $126, %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_127_mask_lshr_1:
; X64: # %bb.0:
@@ -552,13 +552,13 @@ define i16 @test_i16_127_mask_lshr_1(i16 %a0) {
}
define i16 @test_i16_2032_mask_lshr_3(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_lshr_3:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $2032, %eax # imm = 0x7F0
-; X32-NEXT: shrl $3, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_lshr_3:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $2032, %eax # imm = 0x7F0
+; X86-NEXT: shrl $3, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_lshr_3:
; X64: # %bb.0:
@@ -572,13 +572,13 @@ define i16 @test_i16_2032_mask_lshr_3(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_lshr_4(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_lshr_4:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $4, %eax
-; X32-NEXT: andl $127, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_lshr_4:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $4, %eax
+; X86-NEXT: andl $127, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_lshr_4:
; X64: # %bb.0:
@@ -592,13 +592,13 @@ define i16 @test_i16_2032_mask_lshr_4(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_lshr_5(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_lshr_5:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $5, %eax
-; X32-NEXT: andl $63, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_lshr_5:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $5, %eax
+; X86-NEXT: andl $63, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_lshr_5:
; X64: # %bb.0:
@@ -612,13 +612,13 @@ define i16 @test_i16_2032_mask_lshr_5(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_lshr_6(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_lshr_6:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $6, %eax
-; X32-NEXT: andl $31, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_lshr_6:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $6, %eax
+; X86-NEXT: andl $31, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_lshr_6:
; X64: # %bb.0:
@@ -633,13 +633,13 @@ define i16 @test_i16_2032_mask_lshr_6(i16 %a0) {
}
define i16 @test_i16_65024_mask_lshr_1(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $65024, %eax # imm = 0xFE00
-; X32-NEXT: shrl %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $65024, %eax # imm = 0xFE00
+; X86-NEXT: shrl %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_lshr_1:
; X64: # %bb.0:
@@ -653,13 +653,13 @@ define i16 @test_i16_65024_mask_lshr_1(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_65024_mask_lshr_8(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_lshr_8:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $65024, %eax # imm = 0xFE00
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_lshr_8:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $65024, %eax # imm = 0xFE00
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_lshr_8:
; X64: # %bb.0:
@@ -673,12 +673,12 @@ define i16 @test_i16_65024_mask_lshr_8(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_65024_mask_lshr_9(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_lshr_9:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $9, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_lshr_9:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $9, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_lshr_9:
; X64: # %bb.0:
@@ -691,12 +691,12 @@ define i16 @test_i16_65024_mask_lshr_9(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_65024_mask_lshr_10(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_lshr_10:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $10, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_lshr_10:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $10, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_lshr_10:
; X64: # %bb.0:
@@ -712,13 +712,13 @@ define i16 @test_i16_65024_mask_lshr_10(i16 %a0) {
; ashr
define i16 @test_i16_127_mask_ashr_1(i16 %a0) {
-; X32-LABEL: test_i16_127_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $126, %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_127_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $126, %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_127_mask_ashr_1:
; X64: # %bb.0:
@@ -733,13 +733,13 @@ define i16 @test_i16_127_mask_ashr_1(i16 %a0) {
}
define i16 @test_i16_2032_mask_ashr_3(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_ashr_3:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $2032, %eax # imm = 0x7F0
-; X32-NEXT: shrl $3, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_ashr_3:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $2032, %eax # imm = 0x7F0
+; X86-NEXT: shrl $3, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_ashr_3:
; X64: # %bb.0:
@@ -753,13 +753,13 @@ define i16 @test_i16_2032_mask_ashr_3(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_ashr_4(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_ashr_4:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $4, %eax
-; X32-NEXT: andl $127, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_ashr_4:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $4, %eax
+; X86-NEXT: andl $127, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_ashr_4:
; X64: # %bb.0:
@@ -773,13 +773,13 @@ define i16 @test_i16_2032_mask_ashr_4(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_ashr_5(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_ashr_5:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $5, %eax
-; X32-NEXT: andl $63, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_ashr_5:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $5, %eax
+; X86-NEXT: andl $63, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_ashr_5:
; X64: # %bb.0:
@@ -793,13 +793,13 @@ define i16 @test_i16_2032_mask_ashr_5(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_ashr_6(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_ashr_6:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $6, %eax
-; X32-NEXT: andl $31, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_ashr_6:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $6, %eax
+; X86-NEXT: andl $31, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_ashr_6:
; X64: # %bb.0:
@@ -814,14 +814,14 @@ define i16 @test_i16_2032_mask_ashr_6(i16 %a0) {
}
define i16 @test_i16_65024_mask_ashr_1(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $65024, %eax # imm = 0xFE00
-; X32-NEXT: cwtl
-; X32-NEXT: shrl %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $65024, %eax # imm = 0xFE00
+; X86-NEXT: cwtl
+; X86-NEXT: shrl %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_ashr_1:
; X64: # %bb.0:
@@ -835,14 +835,14 @@ define i16 @test_i16_65024_mask_ashr_1(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_65024_mask_ashr_8(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_ashr_8:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $65024, %eax # imm = 0xFE00
-; X32-NEXT: cwtl
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_ashr_8:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $65024, %eax # imm = 0xFE00
+; X86-NEXT: cwtl
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_ashr_8:
; X64: # %bb.0:
@@ -856,12 +856,12 @@ define i16 @test_i16_65024_mask_ashr_8(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_65024_mask_ashr_9(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_ashr_9:
-; X32: # %bb.0:
-; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $9, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_ashr_9:
+; X86: # %bb.0:
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $9, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_ashr_9:
; X64: # %bb.0:
@@ -874,12 +874,12 @@ define i16 @test_i16_65024_mask_ashr_9(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_65024_mask_ashr_10(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_ashr_10:
-; X32: # %bb.0:
-; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $10, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_ashr_10:
+; X86: # %bb.0:
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $10, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_ashr_10:
; X64: # %bb.0:
@@ -895,13 +895,13 @@ define i16 @test_i16_65024_mask_ashr_10(i16 %a0) {
; shl
define i16 @test_i16_127_mask_shl_1(i16 %a0) {
-; X32-LABEL: test_i16_127_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $127, %eax
-; X32-NEXT: addl %eax, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_127_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $127, %eax
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_127_mask_shl_1:
; X64: # %bb.0:
@@ -915,13 +915,13 @@ define i16 @test_i16_127_mask_shl_1(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_127_mask_shl_8(i16 %a0) {
-; X32-LABEL: test_i16_127_mask_shl_8:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $127, %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_127_mask_shl_8:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $127, %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_127_mask_shl_8:
; X64: # %bb.0:
@@ -935,12 +935,12 @@ define i16 @test_i16_127_mask_shl_8(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_127_mask_shl_9(i16 %a0) {
-; X32-LABEL: test_i16_127_mask_shl_9:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $9, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_127_mask_shl_9:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $9, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_127_mask_shl_9:
; X64: # %bb.0:
@@ -953,12 +953,12 @@ define i16 @test_i16_127_mask_shl_9(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_127_mask_shl_10(i16 %a0) {
-; X32-LABEL: test_i16_127_mask_shl_10:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $10, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_127_mask_shl_10:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $10, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_127_mask_shl_10:
; X64: # %bb.0:
@@ -972,13 +972,13 @@ define i16 @test_i16_127_mask_shl_10(i16 %a0) {
}
define i16 @test_i16_2032_mask_shl_3(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_shl_3:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $2032, %eax # imm = 0x7F0
-; X32-NEXT: shll $3, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_shl_3:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $2032, %eax # imm = 0x7F0
+; X86-NEXT: shll $3, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_shl_3:
; X64: # %bb.0:
@@ -992,13 +992,13 @@ define i16 @test_i16_2032_mask_shl_3(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_shl_4(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_shl_4:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $2032, %eax # imm = 0x7F0
-; X32-NEXT: shll $4, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_shl_4:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $2032, %eax # imm = 0x7F0
+; X86-NEXT: shll $4, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_shl_4:
; X64: # %bb.0:
@@ -1012,13 +1012,13 @@ define i16 @test_i16_2032_mask_shl_4(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_shl_5(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_shl_5:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $2032, %eax # imm = 0x7F0
-; X32-NEXT: shll $5, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_shl_5:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $2032, %eax # imm = 0x7F0
+; X86-NEXT: shll $5, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_shl_5:
; X64: # %bb.0:
@@ -1032,13 +1032,13 @@ define i16 @test_i16_2032_mask_shl_5(i16 %a0) {
ret i16 %t1
}
define i16 @test_i16_2032_mask_shl_6(i16 %a0) {
-; X32-LABEL: test_i16_2032_mask_shl_6:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $1008, %eax # imm = 0x3F0
-; X32-NEXT: shll $6, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_2032_mask_shl_6:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $1008, %eax # imm = 0x3F0
+; X86-NEXT: shll $6, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_2032_mask_shl_6:
; X64: # %bb.0:
@@ -1053,13 +1053,13 @@ define i16 @test_i16_2032_mask_shl_6(i16 %a0) {
}
define i16 @test_i16_65024_mask_shl_1(i16 %a0) {
-; X32-LABEL: test_i16_65024_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $32256, %eax # imm = 0x7E00
-; X32-NEXT: addl %eax, %eax
-; X32-NEXT: # kill: def $ax killed $ax killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_i16_65024_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $32256, %eax # imm = 0x7E00
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i16_65024_mask_shl_1:
; X64: # %bb.0:
@@ -1080,12 +1080,12 @@ define i16 @test_i16_65024_mask_shl_1(i16 %a0) {
; lshr
define i32 @test_i32_32767_mask_lshr_1(i32 %a0) {
-; X32-LABEL: test_i32_32767_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $32766, %eax # imm = 0x7FFE
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_32767_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $32766, %eax # imm = 0x7FFE
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_32767_mask_lshr_1:
; X64: # %bb.0:
@@ -1099,12 +1099,12 @@ define i32 @test_i32_32767_mask_lshr_1(i32 %a0) {
}
define i32 @test_i32_8388352_mask_lshr_7(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_lshr_7:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $7, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_lshr_7:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $7, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_lshr_7:
; X64: # %bb.0:
@@ -1117,12 +1117,12 @@ define i32 @test_i32_8388352_mask_lshr_7(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_lshr_8(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_lshr_8:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_lshr_8:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_lshr_8:
; X64: # %bb.0:
@@ -1135,12 +1135,12 @@ define i32 @test_i32_8388352_mask_lshr_8(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_lshr_9(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_lshr_9:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388096, %eax # imm = 0x7FFE00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $9, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_lshr_9:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388096, %eax # imm = 0x7FFE00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $9, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_lshr_9:
; X64: # %bb.0:
@@ -1153,12 +1153,12 @@ define i32 @test_i32_8388352_mask_lshr_9(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_lshr_10(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_lshr_10:
-; X32: # %bb.0:
-; X32-NEXT: movl $8387584, %eax # imm = 0x7FFC00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $10, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_lshr_10:
+; X86: # %bb.0:
+; X86-NEXT: movl $8387584, %eax # imm = 0x7FFC00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $10, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_lshr_10:
; X64: # %bb.0:
@@ -1172,12 +1172,12 @@ define i32 @test_i32_8388352_mask_lshr_10(i32 %a0) {
}
define i32 @test_i32_4294836224_mask_lshr_1(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_lshr_1:
; X64: # %bb.0:
@@ -1190,12 +1190,12 @@ define i32 @test_i32_4294836224_mask_lshr_1(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_4294836224_mask_lshr_16(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_lshr_16:
-; X32: # %bb.0:
-; X32-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $16, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_lshr_16:
+; X86: # %bb.0:
+; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $16, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_lshr_16:
; X64: # %bb.0:
@@ -1208,11 +1208,11 @@ define i32 @test_i32_4294836224_mask_lshr_16(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_4294836224_mask_lshr_17(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_lshr_17:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $17, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_lshr_17:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $17, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_lshr_17:
; X64: # %bb.0:
@@ -1224,11 +1224,11 @@ define i32 @test_i32_4294836224_mask_lshr_17(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_4294836224_mask_lshr_18(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_lshr_18:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $18, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_lshr_18:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $18, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_lshr_18:
; X64: # %bb.0:
@@ -1243,12 +1243,12 @@ define i32 @test_i32_4294836224_mask_lshr_18(i32 %a0) {
; ashr
define i32 @test_i32_32767_mask_ashr_1(i32 %a0) {
-; X32-LABEL: test_i32_32767_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $32766, %eax # imm = 0x7FFE
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_32767_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $32766, %eax # imm = 0x7FFE
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_32767_mask_ashr_1:
; X64: # %bb.0:
@@ -1262,12 +1262,12 @@ define i32 @test_i32_32767_mask_ashr_1(i32 %a0) {
}
define i32 @test_i32_8388352_mask_ashr_7(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_ashr_7:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $7, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_ashr_7:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $7, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_ashr_7:
; X64: # %bb.0:
@@ -1280,12 +1280,12 @@ define i32 @test_i32_8388352_mask_ashr_7(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_ashr_8(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_ashr_8:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_ashr_8:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_ashr_8:
; X64: # %bb.0:
@@ -1298,12 +1298,12 @@ define i32 @test_i32_8388352_mask_ashr_8(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_ashr_9(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_ashr_9:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388096, %eax # imm = 0x7FFE00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $9, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_ashr_9:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388096, %eax # imm = 0x7FFE00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $9, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_ashr_9:
; X64: # %bb.0:
@@ -1316,12 +1316,12 @@ define i32 @test_i32_8388352_mask_ashr_9(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_ashr_10(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_ashr_10:
-; X32: # %bb.0:
-; X32-NEXT: movl $8387584, %eax # imm = 0x7FFC00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $10, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_ashr_10:
+; X86: # %bb.0:
+; X86-NEXT: movl $8387584, %eax # imm = 0x7FFC00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $10, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_ashr_10:
; X64: # %bb.0:
@@ -1335,12 +1335,12 @@ define i32 @test_i32_8388352_mask_ashr_10(i32 %a0) {
}
define i32 @test_i32_4294836224_mask_ashr_1(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sarl %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_ashr_1:
; X64: # %bb.0:
@@ -1353,12 +1353,12 @@ define i32 @test_i32_4294836224_mask_ashr_1(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_4294836224_mask_ashr_16(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_ashr_16:
-; X32: # %bb.0:
-; X32-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $16, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_ashr_16:
+; X86: # %bb.0:
+; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sarl $16, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_ashr_16:
; X64: # %bb.0:
@@ -1371,11 +1371,11 @@ define i32 @test_i32_4294836224_mask_ashr_16(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_4294836224_mask_ashr_17(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_ashr_17:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $17, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_ashr_17:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sarl $17, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_ashr_17:
; X64: # %bb.0:
@@ -1387,11 +1387,11 @@ define i32 @test_i32_4294836224_mask_ashr_17(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_4294836224_mask_ashr_18(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_ashr_18:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $18, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_ashr_18:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sarl $18, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_ashr_18:
; X64: # %bb.0:
@@ -1406,12 +1406,12 @@ define i32 @test_i32_4294836224_mask_ashr_18(i32 %a0) {
; shl
define i32 @test_i32_32767_mask_shl_1(i32 %a0) {
-; X32-LABEL: test_i32_32767_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: addl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_32767_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_32767_mask_shl_1:
; X64: # %bb.0:
@@ -1424,12 +1424,12 @@ define i32 @test_i32_32767_mask_shl_1(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_32767_mask_shl_16(i32 %a0) {
-; X32-LABEL: test_i32_32767_mask_shl_16:
-; X32: # %bb.0:
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $16, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_32767_mask_shl_16:
+; X86: # %bb.0:
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_32767_mask_shl_16:
; X64: # %bb.0:
@@ -1442,11 +1442,11 @@ define i32 @test_i32_32767_mask_shl_16(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_32767_mask_shl_17(i32 %a0) {
-; X32-LABEL: test_i32_32767_mask_shl_17:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $17, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_32767_mask_shl_17:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $17, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_32767_mask_shl_17:
; X64: # %bb.0:
@@ -1458,11 +1458,11 @@ define i32 @test_i32_32767_mask_shl_17(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_32767_mask_shl_18(i32 %a0) {
-; X32-LABEL: test_i32_32767_mask_shl_18:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $18, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_32767_mask_shl_18:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $18, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_32767_mask_shl_18:
; X64: # %bb.0:
@@ -1475,12 +1475,12 @@ define i32 @test_i32_32767_mask_shl_18(i32 %a0) {
}
define i32 @test_i32_8388352_mask_shl_7(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_shl_7:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $7, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_shl_7:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $7, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_shl_7:
; X64: # %bb.0:
@@ -1493,12 +1493,12 @@ define i32 @test_i32_8388352_mask_shl_7(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_shl_8(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_shl_8:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_shl_8:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_shl_8:
; X64: # %bb.0:
@@ -1511,12 +1511,12 @@ define i32 @test_i32_8388352_mask_shl_8(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_shl_9(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_shl_9:
-; X32: # %bb.0:
-; X32-NEXT: movl $8388352, %eax # imm = 0x7FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $9, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_shl_9:
+; X86: # %bb.0:
+; X86-NEXT: movl $8388352, %eax # imm = 0x7FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $9, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_shl_9:
; X64: # %bb.0:
@@ -1529,12 +1529,12 @@ define i32 @test_i32_8388352_mask_shl_9(i32 %a0) {
ret i32 %t1
}
define i32 @test_i32_8388352_mask_shl_10(i32 %a0) {
-; X32-LABEL: test_i32_8388352_mask_shl_10:
-; X32: # %bb.0:
-; X32-NEXT: movl $4194048, %eax # imm = 0x3FFF00
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $10, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_8388352_mask_shl_10:
+; X86: # %bb.0:
+; X86-NEXT: movl $4194048, %eax # imm = 0x3FFF00
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $10, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_8388352_mask_shl_10:
; X64: # %bb.0:
@@ -1548,12 +1548,12 @@ define i32 @test_i32_8388352_mask_shl_10(i32 %a0) {
}
define i32 @test_i32_4294836224_mask_shl_1(i32 %a0) {
-; X32-LABEL: test_i32_4294836224_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $2147352576, %eax # imm = 0x7FFE0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: addl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i32_4294836224_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147352576, %eax # imm = 0x7FFE0000
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i32_4294836224_mask_shl_1:
; X64: # %bb.0:
@@ -1573,13 +1573,13 @@ define i32 @test_i32_4294836224_mask_shl_1(i32 %a0) {
; lshr
define i64 @test_i64_2147483647_mask_lshr_1(i64 %a0) {
-; X32-LABEL: test_i64_2147483647_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $2147483646, %eax # imm = 0x7FFFFFFE
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_2147483647_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483646, %eax # imm = 0x7FFFFFFE
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_2147483647_mask_lshr_1:
; X64: # %bb.0:
@@ -1593,14 +1593,14 @@ define i64 @test_i64_2147483647_mask_lshr_1(i64 %a0) {
}
define i64 @test_i64_140737488289792_mask_lshr_15(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_lshr_15:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: shll $16, %ecx
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $17, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_lshr_15:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shll $16, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $17, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_lshr_15:
; X64: # %bb.0:
@@ -1613,14 +1613,14 @@ define i64 @test_i64_140737488289792_mask_lshr_15(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_lshr_16(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_lshr_16:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $16, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_lshr_16:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $16, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_lshr_16:
; X64: # %bb.0:
@@ -1633,14 +1633,14 @@ define i64 @test_i64_140737488289792_mask_lshr_16(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_lshr_17(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_lshr_17:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $15, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_lshr_17:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $15, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_lshr_17:
; X64: # %bb.0:
@@ -1653,14 +1653,14 @@ define i64 @test_i64_140737488289792_mask_lshr_17(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_lshr_18(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_lshr_18:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $14, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_lshr_18:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $14, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_lshr_18:
; X64: # %bb.0:
@@ -1674,12 +1674,12 @@ define i64 @test_i64_140737488289792_mask_lshr_18(i64 %a0) {
}
define i64 @test_i64_18446744065119617024_mask_lshr_1(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_lshr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: shrl %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_lshr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrl %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_lshr_1:
; X64: # %bb.0:
@@ -1692,12 +1692,12 @@ define i64 @test_i64_18446744065119617024_mask_lshr_1(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_18446744065119617024_mask_lshr_32(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_lshr_32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: andl $-2, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_lshr_32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: andl $-2, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_lshr_32:
; X64: # %bb.0:
@@ -1710,12 +1710,12 @@ define i64 @test_i64_18446744065119617024_mask_lshr_32(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_18446744065119617024_mask_lshr_33(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_lshr_33:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_lshr_33:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_lshr_33:
; X64: # %bb.0:
@@ -1727,12 +1727,12 @@ define i64 @test_i64_18446744065119617024_mask_lshr_33(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_18446744065119617024_mask_lshr_34(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_lshr_34:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $2, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_lshr_34:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl $2, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_lshr_34:
; X64: # %bb.0:
@@ -1747,13 +1747,13 @@ define i64 @test_i64_18446744065119617024_mask_lshr_34(i64 %a0) {
; ashr
define i64 @test_i64_2147483647_mask_ashr_1(i64 %a0) {
-; X32-LABEL: test_i64_2147483647_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $2147483646, %eax # imm = 0x7FFFFFFE
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_2147483647_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483646, %eax # imm = 0x7FFFFFFE
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_2147483647_mask_ashr_1:
; X64: # %bb.0:
@@ -1767,14 +1767,14 @@ define i64 @test_i64_2147483647_mask_ashr_1(i64 %a0) {
}
define i64 @test_i64_140737488289792_mask_ashr_15(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_ashr_15:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: shll $16, %ecx
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $17, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_ashr_15:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shll $16, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $17, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_ashr_15:
; X64: # %bb.0:
@@ -1787,14 +1787,14 @@ define i64 @test_i64_140737488289792_mask_ashr_15(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_ashr_16(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_ashr_16:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $16, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_ashr_16:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $16, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_ashr_16:
; X64: # %bb.0:
@@ -1807,14 +1807,14 @@ define i64 @test_i64_140737488289792_mask_ashr_16(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_ashr_17(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_ashr_17:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $15, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_ashr_17:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $15, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_ashr_17:
; X64: # %bb.0:
@@ -1827,14 +1827,14 @@ define i64 @test_i64_140737488289792_mask_ashr_17(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_ashr_18(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_ashr_18:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $32767, %eax # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shldl $14, %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_ashr_18:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $32767, %eax # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl $14, %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_ashr_18:
; X64: # %bb.0:
@@ -1848,12 +1848,12 @@ define i64 @test_i64_140737488289792_mask_ashr_18(i64 %a0) {
}
define i64 @test_i64_18446744065119617024_mask_ashr_1(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_ashr_1:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: sarl %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_ashr_1:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: sarl %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_ashr_1:
; X64: # %bb.0:
@@ -1866,13 +1866,13 @@ define i64 @test_i64_18446744065119617024_mask_ashr_1(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_18446744065119617024_mask_ashr_32(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_ashr_32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: movl %edx, %eax
-; X32-NEXT: andl $-2, %eax
-; X32-NEXT: sarl $31, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_ashr_32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: andl $-2, %eax
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_ashr_32:
; X64: # %bb.0:
@@ -1885,13 +1885,13 @@ define i64 @test_i64_18446744065119617024_mask_ashr_32(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_18446744065119617024_mask_ashr_33(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_ashr_33:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: movl %edx, %eax
-; X32-NEXT: sarl %eax
-; X32-NEXT: sarl $31, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_ashr_33:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: sarl %eax
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_ashr_33:
; X64: # %bb.0:
@@ -1903,13 +1903,13 @@ define i64 @test_i64_18446744065119617024_mask_ashr_33(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_18446744065119617024_mask_ashr_34(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_ashr_34:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: movl %edx, %eax
-; X32-NEXT: sarl $2, %eax
-; X32-NEXT: sarl $31, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_ashr_34:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: sarl $2, %eax
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_ashr_34:
; X64: # %bb.0:
@@ -1924,12 +1924,12 @@ define i64 @test_i64_18446744065119617024_mask_ashr_34(i64 %a0) {
; shl
define i64 @test_i64_2147483647_mask_shl_1(i64 %a0) {
-; X32-LABEL: test_i64_2147483647_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: addl %eax, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_i64_2147483647_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_2147483647_mask_shl_1:
; X64: # %bb.0:
@@ -1941,12 +1941,12 @@ define i64 @test_i64_2147483647_mask_shl_1(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_2147483647_mask_shl_32(i64 %a0) {
-; X32-LABEL: test_i64_2147483647_mask_shl_32:
-; X32: # %bb.0:
-; X32-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_2147483647_mask_shl_32:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_2147483647_mask_shl_32:
; X64: # %bb.0:
@@ -1959,12 +1959,12 @@ define i64 @test_i64_2147483647_mask_shl_32(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_2147483647_mask_shl_33(i64 %a0) {
-; X32-LABEL: test_i64_2147483647_mask_shl_33:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: addl %edx, %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_2147483647_mask_shl_33:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: addl %edx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_2147483647_mask_shl_33:
; X64: # %bb.0:
@@ -1976,12 +1976,12 @@ define i64 @test_i64_2147483647_mask_shl_33(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_2147483647_mask_shl_34(i64 %a0) {
-; X32-LABEL: test_i64_2147483647_mask_shl_34:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: shll $2, %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_2147483647_mask_shl_34:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shll $2, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_2147483647_mask_shl_34:
; X64: # %bb.0:
@@ -1994,16 +1994,16 @@ define i64 @test_i64_2147483647_mask_shl_34(i64 %a0) {
}
define i64 @test_i64_140737488289792_mask_shl_15(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_shl_15:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl %eax, %ecx
-; X32-NEXT: shll $16, %ecx
-; X32-NEXT: movl $32767, %edx # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: shldl $15, %ecx, %edx
-; X32-NEXT: shll $31, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_shl_15:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: shll $16, %ecx
+; X86-NEXT: movl $32767, %edx # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shldl $15, %ecx, %edx
+; X86-NEXT: shll $31, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_shl_15:
; X64: # %bb.0:
@@ -2016,15 +2016,15 @@ define i64 @test_i64_140737488289792_mask_shl_15(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_shl_16(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_shl_16:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $16, %eax
-; X32-NEXT: movl $32767, %edx # imm = 0x7FFF
-; X32-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: shldl $16, %eax, %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_shl_16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: movl $32767, %edx # imm = 0x7FFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shldl $16, %eax, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_shl_16:
; X64: # %bb.0:
@@ -2037,14 +2037,14 @@ define i64 @test_i64_140737488289792_mask_shl_16(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_shl_17(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_shl_17:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $16, %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: shldl $17, %eax, %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_shl_17:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shldl $17, %eax, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_shl_17:
; X64: # %bb.0:
@@ -2057,14 +2057,14 @@ define i64 @test_i64_140737488289792_mask_shl_17(i64 %a0) {
ret i64 %t1
}
define i64 @test_i64_140737488289792_mask_shl_18(i64 %a0) {
-; X32-LABEL: test_i64_140737488289792_mask_shl_18:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $16, %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: shldl $18, %eax, %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_140737488289792_mask_shl_18:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shldl $18, %eax, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_140737488289792_mask_shl_18:
; X64: # %bb.0:
@@ -2078,13 +2078,13 @@ define i64 @test_i64_140737488289792_mask_shl_18(i64 %a0) {
}
define i64 @test_i64_18446744065119617024_mask_shl_1(i64 %a0) {
-; X32-LABEL: test_i64_18446744065119617024_mask_shl_1:
-; X32: # %bb.0:
-; X32-NEXT: movl $2147483646, %edx # imm = 0x7FFFFFFE
-; X32-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X32-NEXT: addl %edx, %edx
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_i64_18446744065119617024_mask_shl_1:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483646, %edx # imm = 0x7FFFFFFE
+; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: addl %edx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_i64_18446744065119617024_mask_shl_1:
; X64: # %bb.0:
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