[PATCH] D124841: [PowerPC] Stash GPR to VSR if emergency spill slot is not reachable

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai created this revision.
nemanjai added reviewers: PowerPC, pkubaj.
Herald added subscribers: steven.zhang, shchenz, kbarton, hiraditya.
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When removing frame indices on PowerPC, we need to scavenge a GPR to materialize a large constant if the stack offset for the spill/reload cannot be reached by a D-Form instruction. However, in a perfect storm of conditions, we may not have GPR's available to scavenge, thereby requiring an emergency spill. If such an emergency spill also needs to be spilled to a location with a large offset, it would itself require register scavenging thereby creating an infinite loop.

This patch detects when the scavenger cannot scavenge a register and the spill/reload is to a location with a large offset. It then stashes a GPR into a VSR so that it can use the GPR to materialize the constant (rather than scavenging a GPR).

Fixes: https://github.com/llvm/llvm-project/issues/52894


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D124841

Files:
  llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  llvm/test/CodeGen/PowerPC/pr52894-32bit.ll
  llvm/test/CodeGen/PowerPC/pr52894.ll

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