[PATCH] D124684: [RISCV] Fix incorrect codegen for masked vmsge{u}.vx with mask agnostic.
Zakk Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 2 18:58:05 PDT 2022
khchen added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/masked-tama.ll:1435
+; RV64-NEXT: vmslt.vx v8, v8, a0, v0.t
+; RV64-NEXT: vsetvli zero, zero, e8, mf8, ta, mu
+; RV64-NEXT: vmxor.mm v0, v8, v0
----------------
kito-cheng wrote:
> craig.topper wrote:
> > Will we eventually be able to use 'ma' here?
> Sounds like that what we can optimized in vsetvli insertion?
Yes, I think I could try to add `ForceMaskAgnostic` or optimize InsertVSETVLI in follow-up patch.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D124684/new/
https://reviews.llvm.org/D124684
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