[PATCH] D124764: [NFC][GVNSink] Don't pretend that iteration is over instructions when it's actually over blocks

[Dawid Jurczak via Phabricator via llvm-commits]

yurai007 created this revision.
yurai007 added reviewers: jmolloy, jeroen.dobbelaere, jnspaulsson, nikic, lebedev.ri, xbolva00.
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yurai007 requested review of this revision.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D124764

Files:
  llvm/lib/Transforms/Scalar/GVNSink.cpp


Index: llvm/lib/Transforms/Scalar/GVNSink.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/GVNSink.cpp
+++ llvm/lib/Transforms/Scalar/GVNSink.cpp
@@ -779,11 +779,11 @@
 
   unsigned NumOrigPreds = Preds.size();
   // We can only sink instructions through unconditional branches.
-  for (auto I = Preds.begin(); I != Preds.end();) {
-    if ((*I)->getTerminator()->getNumSuccessors() != 1)
-      I = Preds.erase(I);
+  for (auto BB = Preds.begin(); BB != Preds.end();) {
+    if ((*BB)->getTerminator()->getNumSuccessors() != 1)
+      BB = Preds.erase(BB);
     else
-      ++I;
+      ++BB;
   }
 
   LockstepReverseIterator LRI(Preds);


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