[PATCH] D124733: [AMDGPU][NFC] Make lowerINSERT_VECTOR_ELT() more readable

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:5811-5812
+  //
+  // TODO: However, we can only handle vector size of 64 bits for now.
+  assert(VecSize <= 64);
 
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Don't see the point of this todo. We don't have bit operations > 64 bit so wouldn't want to handle them here


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:5835
+
+  // Perform (3) above.
+  SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, IntVT, Vec);
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Why refer to another comment instead of just adding the comment here in the first place?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124733/new/

https://reviews.llvm.org/D124733