[PATCH] D124526: [SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both.

Sat Apr 30 03:30:39 PDT 2022

aqjune added a comment.

There was a similar miscompilation report (which was introduced by my patch) and a bug fix due to the existence of `select cond, true, false` in the past: https://reviews.llvm.org/rG5bb38e84d3d0#986154 and https://reviews.llvm.org/rG6b4b1dc6ec6f0bf0a1bb414fbe751ccab99d41a0
Also a follow-up patch to enhance an assertion condition: https://reviews.llvm.org/rG431a40e1e28f181e87dd247b91a5e6872dd64ab4

> This only fixes trivial unswitching for now, but a similar problem
> likely exists with non-trivial unswitching.

If the `select cond, true, false` is a concern, what do you think about simplifying it to `cond` (https://alive2.llvm.org/ce/z/p5Ahrp) in advance before loop unswitch?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124526/new/

https://reviews.llvm.org/D124526