[llvm] 65dbd8d - [SelectionDAG] Pre-commit test for D124696. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-04-29T17:24:13-07:00
New Revision: 65dbd8d7933a3c27dfc9f74f2480f15be3dc53ed

URL: https://github.com/llvm/llvm-project/commit/65dbd8d7933a3c27dfc9f74f2480f15be3dc53ed
DIFF: https://github.com/llvm/llvm-project/commit/65dbd8d7933a3c27dfc9f74f2480f15be3dc53ed.diff

LOG: [SelectionDAG] Pre-commit test for D124696. NFC

Added: 
    llvm/test/CodeGen/AArch64/pr55178.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/pr55178.ll b/llvm/test/CodeGen/AArch64/pr55178.ll
new file mode 100644
index 000000000000..18a8ee87e674
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/pr55178.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu | FileCheck %s
+
+; This used to generate incorrect code because we sign extended
+; the undef to undef instead of to 0.
+
+define i1 @test14(i8 %X) {
+; CHECK-LABEL: test14:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #-113
+; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
+; CHECK-NEXT:    lsl w8, w8, w0
+; CHECK-NEXT:    cmp w8, w8, sxtb
+; CHECK-NEXT:    cset w0, lt
+; CHECK-NEXT:    ret
+  %1 = shl i8 -113, %X
+  %cmp = icmp slt i8 undef, %1
+  ret i1 %cmp
+}