[llvm] 336a123 - [X86] SimplifyDemandedVectorEltsForTargetNode - fold shift(0,x) -> 0

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-04-29T11:32:54+01:00
New Revision: 336a1233b292513657d1908583b3114a2419f274

URL: https://github.com/llvm/llvm-project/commit/336a1233b292513657d1908583b3114a2419f274
DIFF: https://github.com/llvm/llvm-project/commit/336a1233b292513657d1908583b3114a2419f274.diff

LOG: [X86] SimplifyDemandedVectorEltsForTargetNode - fold shift(0,x) -> 0

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/pr55158.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c7325d55ded7..195bd98d943a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -40498,9 +40498,16 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
     if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
                                    Depth + 1))
       return true;
+
+    // Fold shift(0,x) -> 0
+    if (DemandedElts.isSubsetOf(LHSZero))
+      return TLO.CombineTo(
+          Op, getZeroVector(VT.getSimpleVT(), Subtarget, TLO.DAG, SDLoc(Op)));
+
     if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
                                    Depth + 1))
       return true;
+
     KnownZero = LHSZero;
     break;
   }

diff  --git a/llvm/test/CodeGen/X86/pr55158.ll b/llvm/test/CodeGen/X86/pr55158.ll
index bac6e4893fc8..0590eb766101 100644
--- a/llvm/test/CodeGen/X86/pr55158.ll
+++ b/llvm/test/CodeGen/X86/pr55158.ll
@@ -5,15 +5,8 @@
 define <2 x i64> @PR55158(ptr %0) {
 ; CHECK-LABEL: PR55158:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vmovdqa 64(%rdi), %xmm0
-; CHECK-NEXT:    vmovdqa 128(%rdi), %xmm1
-; CHECK-NEXT:    vpmovsxbd (%rdi), %xmm2
-; CHECK-NEXT:    vpcmpgtd %xmm2, %xmm1, %xmm1
-; CHECK-NEXT:    vphsubw %xmm0, %xmm0, %xmm0
-; CHECK-NEXT:    vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
-; CHECK-NEXT:    vpxor %xmm2, %xmm2, %xmm2
-; CHECK-NEXT:    vpsrlvq %xmm1, %xmm2, %xmm1
-; CHECK-NEXT:    vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm0[1]
+; CHECK-NEXT:    vpxor %xmm0, %xmm0, %xmm0
+; CHECK-NEXT:    vphsubw 64(%rdi), %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %2 = load <16 x i8>, ptr %0, align 16
   %3 = getelementptr inbounds i32, ptr %0, i64 16