[PATCH] D124472: [AMDGPU] Properly mark MUBUF and FLAT LDS DMA instructions. NFC.

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

Intersting that I can only create such MMOs during lowering. I do not see how an intrinsic call in IR can get 2 distinct MMOs. I have managed to get one, which is a 'load store' on address space 4. This is most certainly not a normal memory operation for llvm and not even a normal memory intrinsic. I cannot really express that an intrinsic reads addrspace 1 and writes addrspace 3. I think I have even figured out how much memory does it read and write, but the data type in too wide to express: wave size * operation size. For a single dword that is v64i32, but it can be 4 times more.


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