[PATCH] D124526: [SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both.

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


================
Comment at: llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp:2766
     while (match(Cond, m_Select(m_Value(CondNext), m_One(), m_Zero())))
       Cond = CondNext;
     BI->setCondition(Cond);
----------------
Looks like this code tries to handle this special case as well.


================
Comment at: llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp:2780
       TinyPtrVector<Value *> Invariants =
-          collectHomogenousInstGraphLoopInvariants(L, CondI, LI);
+          collectHomogenousInstGraphLoopInvariants(L, CondI, None, LI);
       if (Invariants.empty())
----------------
Can we also determine ExitDirection here? I think the implementation of           collectHomogenousInstGraphLoopInvariants() would be a good deal cleaner if we always passed in whether we expect or/and, rather than doing a guess in some of the cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124526/new/

https://reviews.llvm.org/D124526