[PATCH] D124096: [RISCV] Use default promotion for (i32 (shl 1, X)) on RV64 when Zbs is enabled.

[Craig Topper via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGec11fbb1d682: [RISCV] Use default promotion for (i32 (shl 1, X)) on RV64 when Zbs is enabled. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124096/new/

https://reviews.llvm.org/D124096

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rv64zbs.ll

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