[llvm] 2ae15c9 - [InstCombine] Add tests for or of icmp trunc/and (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 28 05:50:58 PDT 2022
Author: Nikita Popov
Date: 2022-04-28T14:50:45+02:00
New Revision: 2ae15c98ed8d3d5efab9c8890e98c7b1ce005825
URL: https://github.com/llvm/llvm-project/commit/2ae15c98ed8d3d5efab9c8890e98c7b1ce005825
DIFF: https://github.com/llvm/llvm-project/commit/2ae15c98ed8d3d5efab9c8890e98c7b1ce005825.diff
LOG: [InstCombine] Add tests for or of icmp trunc/and (NFC)
Added:
Modified:
llvm/test/Transforms/InstCombine/merge-icmp.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/merge-icmp.ll b/llvm/test/Transforms/InstCombine/merge-icmp.ll
index 093e306639803..4ca63cd3441dd 100644
--- a/llvm/test/Transforms/InstCombine/merge-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/merge-icmp.ll
@@ -1,8 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=instcombine < %s | FileCheck %s
-define i1 @test1(i16* %x) {
-; CHECK-LABEL: @test1(
+declare void @use.i1(i1)
+declare void @use.i8(i8)
+declare void @use.i16(i16)
+
+define i1 @and_test1(i16* %x) {
+; CHECK-LABEL: @and_test1(
; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 17791
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -16,8 +20,8 @@ define i1 @test1(i16* %x) {
ret i1 %or
}
-define i1 @test1_logical(i16* %x) {
-; CHECK-LABEL: @test1_logical(
+define i1 @and_test1_logical(i16* %x) {
+; CHECK-LABEL: @and_test1_logical(
; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 17791
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -31,8 +35,8 @@ define i1 @test1_logical(i16* %x) {
ret i1 %or
}
-define <2 x i1> @test1_vector(<2 x i16>* %x) {
-; CHECK-LABEL: @test1_vector(
+define <2 x i1> @and_test1_vector(<2 x i16>* %x) {
+; CHECK-LABEL: @and_test1_vector(
; CHECK-NEXT: [[LOAD:%.*]] = load <2 x i16>, <2 x i16>* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i16> [[LOAD]], <i16 17791, i16 17791>
; CHECK-NEXT: ret <2 x i1> [[TMP1]]
@@ -46,8 +50,8 @@ define <2 x i1> @test1_vector(<2 x i16>* %x) {
ret <2 x i1> %or
}
-define i1 @test2(i16* %x) {
-; CHECK-LABEL: @test2(
+define i1 @and_test2(i16* %x) {
+; CHECK-LABEL: @and_test2(
; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 32581
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -61,8 +65,8 @@ define i1 @test2(i16* %x) {
ret i1 %or
}
-define i1 @test2_logical(i16* %x) {
-; CHECK-LABEL: @test2_logical(
+define i1 @and_test2_logical(i16* %x) {
+; CHECK-LABEL: @and_test2_logical(
; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 32581
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -76,8 +80,8 @@ define i1 @test2_logical(i16* %x) {
ret i1 %or
}
-define <2 x i1> @test2_vector(<2 x i16>* %x) {
-; CHECK-LABEL: @test2_vector(
+define <2 x i1> @and_test2_vector(<2 x i16>* %x) {
+; CHECK-LABEL: @and_test2_vector(
; CHECK-NEXT: [[LOAD:%.*]] = load <2 x i16>, <2 x i16>* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i16> [[LOAD]], <i16 32581, i16 32581>
; CHECK-NEXT: ret <2 x i1> [[TMP1]]
@@ -90,3 +94,261 @@ define <2 x i1> @test2_vector(<2 x i16>* %x) {
%or = and <2 x i1> %cmp1, %cmp2
ret <2 x i1> %or
}
+
+define i1 @or_basic(i16 %load) {
+; CHECK-LABEL: @or_basic(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 17664
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -256
+ %cmp2 = icmp ne i16 %and, 17664
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_basic_commuted(i16 %load) {
+; CHECK-LABEL: @or_basic_commuted(
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD:%.*]], -256
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i16 [[AND]], 32512
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD]] to i8
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i8 [[TRUNC]], 69
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %and = and i16 %load, -256
+ %cmp1 = icmp ne i16 %and, 32512
+ %trunc = trunc i16 %load to i8
+ %cmp2 = icmp ne i8 %trunc, 69
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define <2 x i1> @or_vector(<2 x i16> %load) {
+; CHECK-LABEL: @or_vector(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i16> [[LOAD:%.*]] to <2 x i8>
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne <2 x i8> [[TRUNC]], <i8 127, i8 127>
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i16> [[LOAD]], <i16 -256, i16 -256>
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne <2 x i16> [[AND]], <i16 17664, i16 17664>
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret <2 x i1> [[OR]]
+;
+ %trunc = trunc <2 x i16> %load to <2 x i8>
+ %cmp1 = icmp ne <2 x i8> %trunc, <i8 127, i8 127>
+ %and = and <2 x i16> %load, <i16 -256, i16 -256>
+ %cmp2 = icmp ne <2 x i16> %and, <i16 17664, i16 17664>
+ %or = or <2 x i1> %cmp1, %cmp2
+ ret <2 x i1> %or
+}
+
+define i1 @or_nontrivial_mask1(i16 %load) {
+; CHECK-LABEL: @or_nontrivial_mask1(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], 3840
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 1280
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, 3840
+ %cmp2 = icmp ne i16 %and, 1280
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_nontrivial_mask2(i16 %load) {
+; CHECK-LABEL: @or_nontrivial_mask2(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 20480
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -4096
+ %cmp2 = icmp ne i16 %and, 20480
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_extra_use1(i16 %load) {
+; CHECK-LABEL: @or_extra_use1(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: call void @use.i1(i1 [[CMP1]])
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 20480
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ call void @use.i1(i1 %cmp1)
+ %and = and i16 %load, -4096
+ %cmp2 = icmp ne i16 %and, 20480
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_extra_use2(i16 %load) {
+; CHECK-LABEL: @or_extra_use2(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 20480
+; CHECK-NEXT: call void @use.i1(i1 [[CMP2]])
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -4096
+ %cmp2 = icmp ne i16 %and, 20480
+ call void @use.i1(i1 %cmp2)
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_extra_use3(i16 %load) {
+; CHECK-LABEL: @or_extra_use3(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: call void @use.i8(i8 [[TRUNC]])
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 20480
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ call void @use.i8(i8 %trunc)
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -4096
+ %cmp2 = icmp ne i16 %and, 20480
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_extra_use4(i16 %load) {
+; CHECK-LABEL: @or_extra_use4(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
+; CHECK-NEXT: call void @use.i16(i16 [[AND]])
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 20480
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -4096
+ call void @use.i16(i16 %and)
+ %cmp2 = icmp ne i16 %and, 20480
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_wrong_pred1(i16 %load) {
+; CHECK-LABEL: @or_wrong_pred1(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 17664
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp eq i8 %trunc, 127
+ %and = and i16 %load, -256
+ %cmp2 = icmp ne i16 %and, 17664
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_wrong_pred2(i16 %load) {
+; CHECK-LABEL: @or_wrong_pred2(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i16 [[AND]], 17664
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -256
+ %cmp2 = icmp eq i16 %and, 17664
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_wrong_pred3(i16 %load) {
+; CHECK-LABEL: @or_wrong_pred3(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i16 [[AND]], 17664
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp eq i8 %trunc, 127
+ %and = and i16 %load, -256
+ %cmp2 = icmp eq i16 %and, 17664
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_wrong_op(i16 %load, i16 %other) {
+; CHECK-LABEL: @or_wrong_op(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[OTHER:%.*]], -256
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 17664
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %other, -256
+ %cmp2 = icmp ne i16 %and, 17664
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_wrong_const1(i16 %load) {
+; CHECK-LABEL: @or_wrong_const1(
+; CHECK-NEXT: ret i1 true
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -256
+ %cmp2 = icmp ne i16 %and, 17665
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
+
+define i1 @or_wrong_const2(i16 %load) {
+; CHECK-LABEL: @or_wrong_const2(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD:%.*]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -255
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i16 [[AND]], 17665
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %trunc = trunc i16 %load to i8
+ %cmp1 = icmp ne i8 %trunc, 127
+ %and = and i16 %load, -255
+ %cmp2 = icmp ne i16 %and, 17665
+ %or = or i1 %cmp1, %cmp2
+ ret i1 %or
+}
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