[llvm] e7435e6 - [X86] Add test case for Issue #55157

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-04-28T11:34:45+01:00
New Revision: e7435e61e94834efb41e817448a73fb5e10bfb79

URL: https://github.com/llvm/llvm-project/commit/e7435e61e94834efb41e817448a73fb5e10bfb79
DIFF: https://github.com/llvm/llvm-project/commit/e7435e61e94834efb41e817448a73fb5e10bfb79.diff

LOG: [X86] Add test case for Issue #55157

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/vector-shuffle-combining.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-combining.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
index 87e5cf95e49cc..d5460297f8be3 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
@@ -3333,6 +3333,21 @@ define void @PR45604(<32 x i16>* %dst, <8 x i16>* %src) {
   ret void
 }
 
+; FIXME: getFauxShuffle AND/ANDN decoding wrongly assumes an undef src always gives an undef dst.
+define <2 x i64> @PR55157(<16 x i8>* %0) {
+; CHECK-LABEL: PR55157:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
+  %2 = load <16 x i8>, <16 x i8>* %0, align 16
+  %3 = icmp eq <16 x i8> %2, zeroinitializer
+  %4 = tail call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> zeroinitializer, <16 x i8> zeroinitializer)
+  %5 = select <16 x i1> %3, <16 x i8> <i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %4
+  %6 = shufflevector <16 x i8> %5, <16 x i8> poison, <16 x i32> <i32 8, i32 8, i32 9, i32 9, i32 10, i32 10, i32 11, i32 11, i32 12, i32 12, i32 13, i32 13, i32 14, i32 14, i32 15, i32 15>
+  %7 = bitcast <16 x i8> %6 to <2 x i64>
+  ret <2 x i64> %7
+}
+declare <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8>, <16 x i8>)
+
 ; Test case reported on D105827
 define void @SpinningCube() {
 ; SSE2-LABEL: SpinningCube: