[llvm] 051deb2 - [ARM] add Armv9 build attribute
Ties Stuij via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 28 02:48:58 PDT 2022
Author: Ties Stuij
Date: 2022-04-28T10:48:26+01:00
New Revision: 051deb2d9d3422f6a9ca8e12f33bb6ab6d180bb4
URL: https://github.com/llvm/llvm-project/commit/051deb2d9d3422f6a9ca8e12f33bb6ab6d180bb4
DIFF: https://github.com/llvm/llvm-project/commit/051deb2d9d3422f6a9ca8e12f33bb6ab6d180bb4.diff
LOG: [ARM] add Armv9 build attribute
The build attribute number can be found in the Arm ABI addenda32 document:
https://github.com/ARM-software/abi-aa/blob/main/addenda32/addenda32.rst#335target-related-attributes
Reviewed By: tmatheson
Differential Revision: https://reviews.llvm.org/D124090
Added:
Modified:
llvm/include/llvm/Support/ARMBuildAttributes.h
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Object/ELFObjectFile.cpp
llvm/lib/Support/ARMAttributeParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
llvm/unittests/Support/ARMAttributeParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/Support/ARMBuildAttributes.h b/llvm/include/llvm/Support/ARMBuildAttributes.h
index b4405e7d49084..35f8992ca9329 100644
--- a/llvm/include/llvm/Support/ARMBuildAttributes.h
+++ b/llvm/include/llvm/Support/ARMBuildAttributes.h
@@ -90,25 +90,26 @@ enum AttrType : unsigned {
// Legal Values for CPU_arch, (=6), uleb128
enum CPUArch {
- Pre_v4 = 0,
- v4 = 1, // e.g. SA110
- v4T = 2, // e.g. ARM7TDMI
- v5T = 3, // e.g. ARM9TDMI
- v5TE = 4, // e.g. ARM946E_S
- v5TEJ = 5, // e.g. ARM926EJ_S
- v6 = 6, // e.g. ARM1136J_S
- v6KZ = 7, // e.g. ARM1176JZ_S
- v6T2 = 8, // e.g. ARM1156T2_S
- v6K = 9, // e.g. ARM1176JZ_S
- v7 = 10, // e.g. Cortex A8, Cortex M3
- v6_M = 11, // e.g. Cortex M1
- v6S_M = 12, // v6_M with the System extensions
- v7E_M = 13, // v7_M with DSP extensions
- v8_A = 14, // v8_A AArch32
- v8_R = 15, // e.g. Cortex R52
- v8_M_Base= 16, // v8_M_Base AArch32
- v8_M_Main= 17, // v8_M_Main AArch32
- v8_1_M_Main=21, // v8_1_M_Main AArch32
+ Pre_v4 = 0,
+ v4 = 1, // e.g. SA110
+ v4T = 2, // e.g. ARM7TDMI
+ v5T = 3, // e.g. ARM9TDMI
+ v5TE = 4, // e.g. ARM946E_S
+ v5TEJ = 5, // e.g. ARM926EJ_S
+ v6 = 6, // e.g. ARM1136J_S
+ v6KZ = 7, // e.g. ARM1176JZ_S
+ v6T2 = 8, // e.g. ARM1156T2_S
+ v6K = 9, // e.g. ARM1176JZ_S
+ v7 = 10, // e.g. Cortex A8, Cortex M3
+ v6_M = 11, // e.g. Cortex M1
+ v6S_M = 12, // v6_M with the System extensions
+ v7E_M = 13, // v7_M with DSP extensions
+ v8_A = 14, // v8_A AArch32
+ v8_R = 15, // e.g. Cortex R52
+ v8_M_Base = 16, // v8_M_Base AArch32
+ v8_M_Main = 17, // v8_M_Main AArch32
+ v8_1_M_Main = 21, // v8_1_M_Main AArch32
+ v9_A = 22, // v9_A AArch32
};
enum CPUArchProfile { // (=7), uleb128
diff --git a/llvm/include/llvm/Support/ARMTargetParser.def b/llvm/include/llvm/Support/ARMTargetParser.def
index 80deeb2a6e9dd..6a1ac7213dadd 100644
--- a/llvm/include/llvm/Support/ARMTargetParser.def
+++ b/llvm/include/llvm/Support/ARMTargetParser.def
@@ -129,22 +129,22 @@ ARM_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES |
ARM::AEK_I8MM))
ARM_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
- ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
+ ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD))
ARM_ARCH("armv9.1-a", ARMV9_1A, "9.1-A", "v9.1a",
- ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
+ ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv9.2-a", ARMV9_2A, "9.2-A", "v9.2a",
- ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
+ ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv9.3-a", ARMV9_3A, "9.3-A", "v9.3a",
- ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
+ ARMBuildAttrs::CPUArch::v9_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
diff --git a/llvm/lib/Object/ELFObjectFile.cpp b/llvm/lib/Object/ELFObjectFile.cpp
index d5e46f90361a4..8be1c2b49bd50 100644
--- a/llvm/lib/Object/ELFObjectFile.cpp
+++ b/llvm/lib/Object/ELFObjectFile.cpp
@@ -574,6 +574,9 @@ void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const {
case ARMBuildAttrs::v8_1_M_Main:
Triple += "v8.1m.main";
break;
+ case ARMBuildAttrs::v9_A:
+ Triple += "v9a";
+ break;
}
}
if (!isLittleEndian())
diff --git a/llvm/lib/Support/ARMAttributeParser.cpp b/llvm/lib/Support/ARMAttributeParser.cpp
index 9ba224cee0ca3..adb5d3f0964d0 100644
--- a/llvm/lib/Support/ARMAttributeParser.cpp
+++ b/llvm/lib/Support/ARMAttributeParser.cpp
@@ -87,7 +87,7 @@ Error ARMAttributeParser::CPU_arch(AttrType tag) {
"ARM v6KZ", "ARM v6T2", "ARM v6K", "ARM v7", "ARM v6-M", "ARM v6S-M",
"ARM v7E-M", "ARM v8", nullptr,
"ARM v8-M Baseline", "ARM v8-M Mainline", nullptr, nullptr, nullptr,
- "ARM v8.1-M Mainline"
+ "ARM v8.1-M Mainline", "ARM v9-A"
};
return parseStringAttribute("CPU_arch", tag, makeArrayRef(strings));
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
index 02a2d01176fca..4a22b82bd09b7 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
@@ -122,7 +122,9 @@ static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI) {
if (STI.getCPU() == "xscale")
return ARMBuildAttrs::v5TEJ;
- if (STI.hasFeature(ARM::HasV8Ops)) {
+ if (STI.hasFeature(ARM::HasV9_0aOps))
+ return ARMBuildAttrs::v9_A;
+ else if (STI.hasFeature(ARM::HasV8Ops)) {
if (STI.hasFeature(ARM::FeatureRClass))
return ARMBuildAttrs::v8_R;
return ARMBuildAttrs::v8_A;
diff --git a/llvm/unittests/Support/ARMAttributeParser.cpp b/llvm/unittests/Support/ARMAttributeParser.cpp
index 61dfd6276e311..bd02f1b1f78fa 100644
--- a/llvm/unittests/Support/ARMAttributeParser.cpp
+++ b/llvm/unittests/Support/ARMAttributeParser.cpp
@@ -54,8 +54,8 @@ bool testTagString(unsigned Tag, const char *name) {
TEST(ARMAttributeParser, UnknownCPU_arch) {
static const uint8_t bytes[] = {'A', 15, 0, 0, 0, 'a', 'e', 'a', 'b',
- 'i', 0, 1, 7, 0, 0, 0, 6, 22};
- testParseError(bytes, "unknown CPU_arch value: 22");
+ 'i', 0, 1, 7, 0, 0, 0, 6, 23};
+ testParseError(bytes, "unknown CPU_arch value: 23");
}
TEST(CPUArchBuildAttr, testBuildAttr) {
@@ -99,6 +99,9 @@ TEST(CPUArchBuildAttr, testBuildAttr) {
ARMBuildAttrs::v8_M_Main));
EXPECT_TRUE(testBuildAttr(6, 21, ARMBuildAttrs::CPU_arch,
ARMBuildAttrs::v8_1_M_Main));
+ EXPECT_TRUE(testBuildAttr(6, 22, ARMBuildAttrs::CPU_arch,
+ ARMBuildAttrs::v9_A));
+
}
TEST(CPUArchProfileBuildAttr, testBuildAttr) {
diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp
index a50c6b91b5fd5..186fe575c3767 100644
--- a/llvm/unittests/Support/TargetParserTest.cpp
+++ b/llvm/unittests/Support/TargetParserTest.cpp
@@ -513,13 +513,16 @@ TEST(TargetParserTest, testARMArch) {
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(
testARMArch("armv9-a", "generic", "v9a",
- ARMBuildAttrs::CPUArch::v8_A));
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv9.1-a", "generic", "v9.1a",
- ARMBuildAttrs::CPUArch::v8_A));
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv9.2-a", "generic", "v9.2a",
- ARMBuildAttrs::CPUArch::v8_A));
+ ARMBuildAttrs::CPUArch::v9_A));
+ EXPECT_TRUE(
+ testARMArch("armv9.3-a", "generic", "v9.3a",
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "cortex-r52", "v8r",
ARMBuildAttrs::CPUArch::v8_R));
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