[PATCH] D122860: [RISCV][RVV] Add FPRndModeOp to PseudoVFCVT instructions

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added a comment.

Thanks @arcbbb.

Just to understand the design principle behind these patches: adding `FRM` as `Use` to the `v*cvt` instructions (like we did in D121087 <https://reviews.llvm.org/D121087> ) would not help us to implement `floor` and `ceil`. I imagine one option could be adding specific pseudos for round up and round down and then a later pass could set the rounding mode and restore it later. However, this would not give great code generation and it adds even more instructions to our already large number of pseudos. So your approach goes by adding a new operand with the rounding mode, similar to the scalar operations, and in D123371 <https://reviews.llvm.org/D123371> you propose a pass that adjusts the `FRM` register.

I hope I got it right :)



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Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:99
+
+  HasFPRndModeOpShift = UsesMaskPolicyShift + 1,
+  HasFPRndModeOpMask = 1 << HasFPRndModeOpShift,
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Could you add a comment explaining what this flag means?

What I understand is that for "vfcvt" instructions we annotate the rounding mode. It'll be commonly dynamic except for cases when we want to explicitly round up or down.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9532
   // Add FRM dependency to any instructions with dynamic rounding mode.
+  uint64_t TSFlags = MI.getDesc().TSFlags;
+  if (RISCVII::hasFPRndModeOp(TSFlags)) {
----------------
It looks like you could factor this with the code below, it is very similar.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122860/new/

https://reviews.llvm.org/D122860