[PATCH] D124566: [X86] Move target-generic code into CodeGen [NFC]

[Bill Wendling via Phabricator via llvm-commits]

This revision was not accepted when it landed; it landed in state "Needs Review".
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8f2ec974d1cf: [X86] Move target-generic code into CodeGen [NFC] (authored by void).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124566/new/

https://reviews.llvm.org/D124566

Files:
  llvm/lib/CodeGen/PrologEpilogInserter.cpp
  llvm/lib/Target/X86/X86FrameLowering.cpp


Index: llvm/lib/Target/X86/X86FrameLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86FrameLowering.cpp
+++ llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -500,25 +500,9 @@
                                             MachineBasicBlock &MBB) const {
   const MachineFunction &MF = *MBB.getParent();
 
-  // Don't clear registers that will just be reset before exiting.
-  for (const CalleeSavedInfo &CSI : MF.getFrameInfo().getCalleeSavedInfo())
-    for (MCRegister Reg : TRI->sub_and_superregs_inclusive(CSI.getReg()))
-      RegsToZero.reset(Reg);
-
   // Insertion point.
   MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
 
-  // We don't need to zero out registers that are clobbered by "pop"
-  // instructions.
-  for (MachineBasicBlock::iterator I = MBBI, E = MBB.end(); I != E; ++I)
-    for (const MachineOperand &MO : I->operands()) {
-      if (!MO.isReg())
-        continue;
-
-      for (const MCPhysReg &Reg : TRI->sub_and_superregs_inclusive(MO.getReg()))
-        RegsToZero.reset(Reg);
-    }
-
   // Fake a debug loc.
   DebugLoc DL;
   if (MBBI != MBB.end())
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
===================================================================
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -1227,7 +1227,7 @@
     RegsToZero.set(Reg);
   }
 
-  // Remove registers that are live when leaving the function.
+  // Don't clear registers that are live when leaving the function.
   for (const MachineBasicBlock &MBB : MF)
     for (const MachineInstr &MI : MBB.terminators()) {
       if (!MI.isReturn())
@@ -1242,6 +1242,31 @@
       }
     }
 
+  // Don't need to clear registers that are used/clobbered by terminating
+  // instructions.
+  for (const MachineBasicBlock &MBB : MF) {
+    if (!MBB.isReturnBlock())
+      continue;
+
+    MachineBasicBlock::const_iterator MBBI = MBB.getFirstTerminator();
+    for (MachineBasicBlock::const_iterator I = MBBI, E = MBB.end(); I != E;
+         ++I) {
+      for (const MachineOperand &MO : I->operands()) {
+        if (!MO.isReg())
+          continue;
+
+        for (const MCPhysReg &Reg :
+             TRI.sub_and_superregs_inclusive(MO.getReg()))
+          RegsToZero.reset(Reg);
+      }
+    }
+  }
+
+  // Don't clear registers that are reset before exiting.
+  for (const CalleeSavedInfo &CSI : MF.getFrameInfo().getCalleeSavedInfo())
+    for (MCRegister Reg : TRI.sub_and_superregs_inclusive(CSI.getReg()))
+      RegsToZero.reset(Reg);
+
   const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
   for (MachineBasicBlock &MBB : MF)
     if (MBB.isReturnBlock())


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D124566.425632.patch
Type: text/x-patch
Size: 2711 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220427/0e39fff2/attachment.bin>