[PATCH] D124097: llvm-reduce: Add reduction pass to remove regalloc hints

Wed Apr 27 13:27:13 PDT 2022

arsenm added a comment.

In D124097#3476355 <https://reviews.llvm.org/D124097#3476355>, @MatzeB wrote:

>> I'm a bit confused by what's actually stored for the allocation hints. The MIR parser only handles the "simple" case where there's a single hint. I don't really understand the assertion in clearSimpleHint, or under what circumstances there are multiple hint registers.
>
> I'm not super familiar with the regalloc hints off-hand. But it seems ARM is the only target using target-specific regalloc hints. You can search for `ARMRI::RegPairEven`, `ARMRI::RegPairOdd`, `ARMRI::RegLR` there. Anyway assuming they are indeed just "hints" then it should be fine to drop them...
>
> It seems to me that clearing a hint may work with `setRegAllocationHint(vreg, 0, Register())`. Though maybe it would be best to create a new `clearRegAllocationHint(...)` API for this to make it more explicit, what do you think?
>
> LGTM (use `setRegAllocationHint` or add a new `clearRegAllocationHint` API at your discretion).

clearSimpleHint already exists (and is used here) and as far as I can tell clears all hints, so I don't understand the naming

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  https://reviews.llvm.org/D124097/new/

https://reviews.llvm.org/D124097