[PATCH] D124319: [MC][AArch64] Enable '+v8a' when nothing specified for MCSubtargetInfo

[Tommy Chiang via Phabricator via llvm-commits]

oToToT updated this revision to Diff 425545.
oToToT edited the summary of this revision.
oToToT added a comment.

Fix typo


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124319/new/

https://reviews.llvm.org/D124319

Files:
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
  llvm/test/MC/AArch64/arm64-branch-encoding.s
  llvm/test/MC/AArch64/arm64-system-encoding.s
  llvm/test/MC/AArch64/basic-a64-instructions.s
  llvm/test/MC/Disassembler/AArch64/arm64-branch.txt
  llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt

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