[PATCH] D122672: [CodeGen][ARM] Enable Swing Module Scheduling for ARM

Thomas Preud'homme via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 27 03:36:05 PDT 2022


thopre added inline comments.


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:1796
     SUnit *Successor = SI.getSUnit();
-    if (!SI.isArtificial() && NodesAdded.count(Successor) == 0)
+    if (!SI.isArtificial() && !Successor->isBoundaryNode() &&
+        NodesAdded.count(Successor) == 0)
----------------
Should we use ignoreDependence here?


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:1802
     SUnit *Predecessor = PI.getSUnit();
     if (!PI.isArtificial() && NodesAdded.count(Predecessor) == 0)
       addConnectedNodes(Predecessor, NewSet, NodesAdded);
----------------
Sorry for the naive question but why are anti-dependences ok here?


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:2272
 /// Return true for an order or output dependence that is loop carried
 /// potentially. A dependence is loop carried if the destination defines a valu
 /// that may be used or defined by the source in a subsequent iteration.
----------------
Maybe fix the typo while you're at it


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:2277
   if ((Dep.getKind() != SDep::Order && Dep.getKind() != SDep::Output) ||
-      Dep.isArtificial())
+      Dep.isArtificial() || Dep.getSUnit()->isBoundaryNode())
     return false;
----------------
Can we drop Dep.isArtificial()?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122672/new/

https://reviews.llvm.org/D122672



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