[PATCH] D124342: [X86][AMX] Report error when shapes are not pre-defined.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 25 23:58:07 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf3ad7ea03a8d: [X86][AMX] Report error when shapes are not pre-defined. (authored by LuoYuanke).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124342/new/
https://reviews.llvm.org/D124342
Files:
llvm/lib/Target/X86/X86PreTileConfig.cpp
llvm/lib/Target/X86/X86TileConfig.cpp
llvm/test/CodeGen/X86/AMX/amx-error.ll
Index: llvm/test/CodeGen/X86/AMX/amx-error.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/AMX/amx-error.ll
@@ -0,0 +1,16 @@
+; RUN: not llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -o /dev/null 2>&1 | FileCheck %s
+
+ at row = dso_local global i16 8, align 2
+ at col = dso_local global i16 8, align 2
+
+define dso_local void @add() {
+entry:
+ ; CHECK: Failed to config tile register
+ %t0 = load i16, ptr @row, align 2
+ %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 %t0, i16 64)
+ %t2 = load i16, ptr @col, align 2
+ %t3 = call x86_amx @llvm.x86.tilezero.internal(i16 16, i16 %t2)
+ ret void
+}
+
+declare x86_amx @llvm.x86.tilezero.internal(i16, i16)
Index: llvm/lib/Target/X86/X86TileConfig.cpp
===================================================================
--- llvm/lib/Target/X86/X86TileConfig.cpp
+++ llvm/lib/Target/X86/X86TileConfig.cpp
@@ -98,6 +98,9 @@
if (SS != INT_MAX)
break;
}
+ // Didn't find LDTILECFG, just return false;
+ if (SS == INT_MAX)
+ return false;
// Try to find a point to insert MIs for constant shapes.
// Here we are leveraging the palette id inserted in PreRA pass.
Index: llvm/lib/Target/X86/X86PreTileConfig.cpp
===================================================================
--- llvm/lib/Target/X86/X86PreTileConfig.cpp
+++ llvm/lib/Target/X86/X86PreTileConfig.cpp
@@ -31,6 +31,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
@@ -40,10 +41,15 @@
using namespace llvm;
#define DEBUG_TYPE "tile-pre-config"
-#define REPORT_CONFIG_FAIL \
- report_fatal_error( \
- MF.getName() + \
- ": Failed to config tile register, please define the shape earlier");
+
+static void emitErrorMsg(MachineFunction &MF) {
+ SmallString<32> Str;
+ Twine ErrorMsg =
+ MF.getName() +
+ ": Failed to config tile register, please define the shape earlier";
+ LLVMContext &Context = MF.getMMI().getModule()->getContext();
+ Context.emitError(ErrorMsg);
+}
namespace {
@@ -302,12 +308,19 @@
SmallVector<MachineBasicBlock *, 8> WorkList;
for (auto &I : ShapeBBs) {
// TODO: We can hoist shapes across BBs here.
- if (BBVisitedInfo[I.first].HasAMXRegLiveIn)
- REPORT_CONFIG_FAIL
+ if (BBVisitedInfo[I.first].HasAMXRegLiveIn) {
+ // We are not able to config tile registers since the shape to config
+ // is not defined yet. Emit error message and continue. The function
+ // would not config tile registers.
+ emitErrorMsg(MF);
+ return false;
+ }
if (BBVisitedInfo[I.first].FirstAMX &&
BBVisitedInfo[I.first].FirstAMX < I.second.back() &&
- !hoistShapesInBB(I.first, I.second))
- REPORT_CONFIG_FAIL
+ !hoistShapesInBB(I.first, I.second)) {
+ emitErrorMsg(MF);
+ return false;
+ }
WorkList.push_back(I.first);
}
while (!WorkList.empty()) {
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