[PATCH] D124369: [InstCombine] C0 >>{ashr, exact} (X - C1) --> (C0 << C1) >>{ashr} X

[Nicolas Abram via Phabricator via llvm-commits]

nico-abram updated this revision to Diff 425026.
nico-abram added a comment.

I collapsed all three into `InstCombinerImpl::commonShiftTransforms`, right below the pre-existing pre-shift combine.

Had to add setHasNoSignedWrap(false); for the Shl case. Otherwise the @shl_nsw_add_negative test case was generating a `shl nsw i32 1` instead of `shl i32 1`. Not entirely sure why, possibly because I'm genering the Op with `BinaryOperator::Create(I.getOpcode()`?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124369/new/

https://reviews.llvm.org/D124369

Files:
  llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
  llvm/test/Transforms/InstCombine/shift-add.ll

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