[PATCH] D124406: [X86] Use indirect addressing for high 2GB of x32 address space
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 25 12:20:01 PDT 2022
efriedma added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1696
+ if (Subtarget->isTarget64BitILP32() && !isUInt<31>(Val) &&
+ !AM.hasBaseOrIndexReg())
+ return true;
----------------
The reasoning here seems strange. For example, suppose I write `void f(int a) { ((char*)0x80000000)[a] = a; }`. That has a base register, but sign-extension is wrong.
I guess you're trying to allow negative pointer offsets here, but I think SelectionDAG is throwing away the distinction you need here. (At the IR level, it's easy to distinguish between the base of a GEP and the offset.)
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124406/new/
https://reviews.llvm.org/D124406
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