[PATCH] D124085: [CodeGen] Fix assertion failure on large types store

[Daniil Kovalev via Phabricator via llvm-commits]

kovdan01 updated this revision to Diff 424938.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124085/new/

https://reviews.llvm.org/D124085

Files:
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/test/CodeGen/X86/codegen_prepare_large_structs.ll


Index: llvm/test/CodeGen/X86/codegen_prepare_large_structs.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/codegen_prepare_large_structs.ll
@@ -0,0 +1,8 @@
+; RUN: opt -codegenprepare -mtriple=x86_64-unknown-unknown -disable-output < %s
+
+%struct.large = type { [2500000 x i8] }
+
+define void @foo(%struct.large %s, %struct.large* %p) {
+  store %struct.large %s, %struct.large* %p, align 1
+  ret void
+}
Index: llvm/lib/CodeGen/CodeGenPrepare.cpp
===================================================================
--- llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -7457,6 +7457,11 @@
     return false;
 
   unsigned HalfValBitSize = DL.getTypeSizeInBits(StoreType) / 2;
+  // Cannot split store into two integer stores if initial store type
+  // is wider than 2 * MAX_INT_BITS
+  if (HalfValBitSize > IntegerType::MAX_INT_BITS)
+    return false;
+
   Type *SplitStoreType = Type::getIntNTy(SI.getContext(), HalfValBitSize);
   if (!DL.typeSizeEqualsStoreSize(SplitStoreType))
     return false;
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
===================================================================
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -596,8 +596,11 @@
   SDUse *UseList = nullptr;
 
   /// The number of entries in the Operand/Value list.
-  unsigned short NumOperands = 0;
-  unsigned short NumValues;
+  unsigned NumOperands = 0;
+  unsigned NumValues;
+
+  /// Source line information.
+  DebugLoc debugLoc;
 
   // The ordering of the SDNodes. It roughly corresponds to the ordering of the
   // original LLVM instructions.
@@ -606,9 +609,6 @@
   // this ordering.
   unsigned IROrder;
 
-  /// Source line information.
-  DebugLoc debugLoc;
-
   /// Return a pointer to the specified value type.
   static const EVT *getValueTypeList(EVT VT);
 
@@ -1067,11 +1067,9 @@
   /// storage. To add operands, see SelectionDAG::createOperands.
   SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
       : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
-        IROrder(Order), debugLoc(std::move(dl)) {
+        debugLoc(std::move(dl)), IROrder(Order) {
     memset(&RawSDNodeBits, 0, sizeof(RawSDNodeBits));
     assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
-    assert(NumValues == VTs.NumVTs &&
-           "NumValues wasn't wide enough for its operands!");
   }
 
   /// Release the operands and set this node to have zero operands.


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