[PATCH] D124144: [RISCV][SelectionDAG] Support VP_ADD/VP_MUL/VP_SUB mask operations

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 25 09:17:56 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:8829
+  // then turn it to VP_XOR or VP_AND
+  if (VT.isVector() && VT.getVectorElementType() == MVT::i1) {
+    switch (Opcode) {
----------------
I meant use the existing switch at line 8796.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124144/new/

https://reviews.llvm.org/D124144



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