[llvm] cd81ecb - [MemorySSA] Generate check lines for test.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2022-04-25T09:02:42+01:00
New Revision: cd81ecba2cbbefcf4c877dba67f7354192d58764

URL: https://github.com/llvm/llvm-project/commit/cd81ecba2cbbefcf4c877dba67f7354192d58764
DIFF: https://github.com/llvm/llvm-project/commit/cd81ecba2cbbefcf4c877dba67f7354192d58764.diff

LOG: [MemorySSA] Generate check lines for test.

This is to ensure we produce the same code when switching to
SimpleLoopUnswitch.

Added: 
    

Modified: 
    llvm/test/Analysis/MemorySSA/update-remove-dead-blocks.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/MemorySSA/update-remove-dead-blocks.ll b/llvm/test/Analysis/MemorySSA/update-remove-dead-blocks.ll
index 5bcc17954de9a..b6f26786787a8 100644
--- a/llvm/test/Analysis/MemorySSA/update-remove-dead-blocks.ll
+++ b/llvm/test/Analysis/MemorySSA/update-remove-dead-blocks.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -loop-unswitch -loop-reduce -loop-simplifycfg -verify-memoryssa -S %s | FileCheck %s
 
 ; TODO: also run with NPM, but currently LSR does not preserve LCSSA, causing a verification failure on the test.
@@ -14,7 +15,26 @@ target triple = "x86_64-unknown-linux-gnu"
 @c = external global [1 x i32], align 4
 
 define i32* @test() {
-; CHECK-LABEL: @test
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT:    i32 1, label [[FOR_BODY3SPLIT:%.*]]
+; CHECK-NEXT:    i32 2, label [[FOR_COND2_2_FOR_BODY3_CRIT_EDGE:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       entry.split:
+; CHECK-NEXT:    br label [[FOR_COND:%.*]]
+; CHECK:       for.cond:
+; CHECK-NEXT:    [[STOREMERGE:%.*]] = phi i64 [ 0, [[ENTRY_SPLIT]] ], [ [[INC7:%.*]], [[FOR_COND]] ]
+; CHECK-NEXT:    [[INC7]] = add nsw i64 [[STOREMERGE]], 1
+; CHECK-NEXT:    br label [[FOR_COND]]
+; CHECK:       for.body3split:
+; CHECK-NEXT:    br label [[FOR_BODY3:%.*]]
+; CHECK:       for.cond2.2.for.body3_crit_edge:
+; CHECK-NEXT:    br label [[FOR_BODY3]]
+; CHECK:       for.body3:
+; CHECK-NEXT:    [[STOREMERGE_LCSSA:%.*]] = phi i64 [ undef, [[FOR_COND2_2_FOR_BODY3_CRIT_EDGE]] ], [ undef, [[FOR_BODY3SPLIT]] ]
+; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1 x i32], [1 x i32]* @c, i64 0, i64 [[STOREMERGE_LCSSA]]
+; CHECK-NEXT:    ret i32* [[ARRAYIDX]]
 ;
 entry:                                                ; preds = %entry
   br label %for.cond