[PATCH] D124308: [MachineScheduler] exclude INLINEASM from schedule when it would increase register pressure

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 23 04:11:36 PDT 2022


pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

The change LG, though I'm not sure if changing `getRegPressureLimit` affects existing code.



================
Comment at: llvm/lib/Target/X86/X86RegisterInfo.cpp:266-271
+  case X86::GR8RegClassID:
+  case X86::GR16RegClassID:
   case X86::GR32RegClassID:
     return 4 - FPDiff;
   case X86::GR64RegClassID:
     return 12 - FPDiff;
----------------
Should we change them to `(Is64Bit ? 12 : 4) - FPDiff` ?


================
Comment at: llvm/lib/Target/X86/X86RegisterInfo.cpp:275
   case X86::VR64RegClassID:
     return 4;
   }
----------------
I wonder why return 4 for it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124308/new/

https://reviews.llvm.org/D124308



More information about the llvm-commits mailing list