[PATCH] D124171: [NVPTX] Support float <-> 2 x half bitcasts
Artem Belevich via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 21 11:20:18 PDT 2022
tra accepted this revision.
tra added a comment.
This revision is now accepted and ready to land.
Thank you for the fix.
The source code which triggered this issue is full of type-puns, but I guess the user should be allowed to shoot one's foot if they really want to. I can only wish them good luck if LLVM/ptxas or hardware decides to flush fp32 value to zero if the bitpattern created by two fp16 values results in a denormal fp32. The funny thing is that their data is originally stored as an array of scalars. They didn't have to use float as an intermediate value.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124171/new/
https://reviews.llvm.org/D124171
More information about the llvm-commits
mailing list