[PATCH] D123988: [LoongArch] Add basic floating-point instructions definition

[WÁNG Xuěruì via Phabricator via llvm-commits]

xen0n added a comment.

In D123988#3463734 <https://reviews.llvm.org/D123988#3463734>, @SixWeining wrote:

> In D123988#3463732 <https://reviews.llvm.org/D123988#3463732>, @xen0n wrote:
>
>> Welp I'm 1 hour late, quick hands... we could use some cleanups later though.
>
> Sorry, I should wait for a while.

Not particularly your fault; I've been busy in `$DAY_JOB` so I'm not paying as close attention as maybe 1 month ago. The comment is more-or-less nitpicky though, no harm in actual functionality.



================
Comment at: llvm/test/MC/LoongArch/Basic/Float/d-invalid.s:3
+
+# CHECK: :[[#@LINE+1]]:1: error: instruction requires the following: LA64 Basic Integer and Privilege Instruction Set
+movgr2fr.d $fa0, $a0
----------------
SixWeining wrote:
> xen0n wrote:
> > `movgr2fr.d` is not part of the D extension?
> Yes, movgr2fr.d is part of the D extension. But this test checks it is not available on LA32 as [[ https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_movgr2fr_wd_movgr2frh_w | the document ]] says:
> 
> ```
> MOVGR2FR.D writes the 64-bit value of general register rj into floating-point register fd.
> ```
> 
> On LA32, general register is 32-bit but not 64-bit. So `MOVGR2FR.D` is not available.
Hmm, for me the message comes as a bit of surprise, because it seems I'm getting asked for integer ISA on a FP insn; I don't know what others (i.e. RISC-V) are doing in this case though (memory is failing me and I cannot devote much time to LLVM before mid-May due to `$DAY_JOB`).


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https://reviews.llvm.org/D123988