[PATCH] D124087: [AMDGPU][GFX90A+] Disabled ds_ordered_count and exp

Dmitry Preobrazhensky via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 20 04:58:57 PDT 2022


dp created this revision.
dp added reviewers: foad, rampitec.
Herald added subscribers: hsmhsm, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, jvesely, kzhuravl, arsenm.
Herald added a project: All.
dp requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

GFX9 SPG explicitly states that these instructions are not supported:

MI200 cannot execute:

- GDS ops – MI200 supports only GWS (not ordered count)
- Exports

These opcodes are not supported by SP3 either.


https://reviews.llvm.org/D124087

Files:
  llvm/lib/Target/AMDGPU/DSInstructions.td
  llvm/lib/Target/AMDGPU/EXPInstructions.td
  llvm/test/MC/AMDGPU/gfx90a_err.s
  llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
  llvm/test/MC/AMDGPU/gfx940_err.s
  llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D124087.423871.patch
Type: text/x-patch
Size: 5760 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220420/f52cf9af/attachment.bin>


More information about the llvm-commits mailing list