[PATCH] D124085: [CodeGen] Fix assertion failure on large types store

Daniil Kovalev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 20 04:00:01 PDT 2022


kovdan01 created this revision.
kovdan01 added reviewers: craig.topper, RKSimon, sunfish.
Herald added subscribers: StephenFan, pengfei, hiraditya.
Herald added a project: All.
kovdan01 requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The following IR:

  %struct.large = type { [2500000 x i8] }
  
  define void @foo(%struct.large %s, %struct.large* %p) {
    store %struct.large %s, %struct.large* %p, align 1
    ret void
  }

caused assertion 'NumBits <= MAX_INT_BITS && "bitwidth too large"' failure.

Keeping in mind that such IR is discouraged, the compiler should not fail on a
formally valid input. This patch fixes this issue.

Fixing that also requires widening NumValues and NumOperands fields of SDNode
to avoid fail of another assertion about insufficient bit width of those fields.
Reordering of SDNode fields was done to keep sizeof(SDNode) == 80 on x86_64
Linux builds.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D124085

Files:
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/lib/CodeGen/CodeGenPrepare.cpp


Index: llvm/lib/CodeGen/CodeGenPrepare.cpp
===================================================================
--- llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -7457,6 +7457,11 @@
     return false;
 
   unsigned HalfValBitSize = DL.getTypeSizeInBits(StoreType) / 2;
+  // Cannot split store into two integer stores if initial store type
+  // is wider than 2 * MAX_INT_BITS
+  if (HalfValBitSize > IntegerType::MAX_INT_BITS)
+    return false;
+
   Type *SplitStoreType = Type::getIntNTy(SI.getContext(), HalfValBitSize);
   if (!DL.typeSizeEqualsStoreSize(SplitStoreType))
     return false;
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
===================================================================
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -596,8 +596,11 @@
   SDUse *UseList = nullptr;
 
   /// The number of entries in the Operand/Value list.
-  unsigned short NumOperands = 0;
-  unsigned short NumValues;
+  unsigned NumOperands = 0;
+  unsigned NumValues;
+
+  /// Source line information.
+  DebugLoc debugLoc;
 
   // The ordering of the SDNodes. It roughly corresponds to the ordering of the
   // original LLVM instructions.
@@ -606,9 +609,6 @@
   // this ordering.
   unsigned IROrder;
 
-  /// Source line information.
-  DebugLoc debugLoc;
-
   /// Return a pointer to the specified value type.
   static const EVT *getValueTypeList(EVT VT);
 
@@ -1067,11 +1067,9 @@
   /// storage. To add operands, see SelectionDAG::createOperands.
   SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
       : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
-        IROrder(Order), debugLoc(std::move(dl)) {
+        debugLoc(std::move(dl)), IROrder(Order) {
     memset(&RawSDNodeBits, 0, sizeof(RawSDNodeBits));
     assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
-    assert(NumValues == VTs.NumVTs &&
-           "NumValues wasn't wide enough for its operands!");
   }
 
   /// Release the operands and set this node to have zero operands.


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D124085.423863.patch
Type: text/x-patch
Size: 2106 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220420/66d42c4b/attachment.bin>


More information about the llvm-commits mailing list