[PATCH] D124080: [RISCV] Support VP_ADD/VP_SUB/VP_MUL mask operation
WangLian via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 20 03:01:57 PDT 2022
Jimerlife created this revision.
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Support VP_ADD/VP_SUB/VP_MUL mask operation
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D124080
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp-mask.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp-mask.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp-mask.ll
llvm/test/CodeGen/RISCV/rvv/vadd-vp-mask.ll
llvm/test/CodeGen/RISCV/rvv/vmul-vp-mask.ll
llvm/test/CodeGen/RISCV/rvv/vsub-vp-mask.ll
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