[llvm] 57d1779 - [Test] Add one more test for patch [SLP]Improve reductions analysis and emission, part 1.

[Max Kazantsev via llvm-commits]

Author: Max Kazantsev
Date: 2022-04-20T13:57:26+07:00
New Revision: 57d17795b9eb6ddb847e13ad79829c3a82c096d9

URL: https://github.com/llvm/llvm-project/commit/57d17795b9eb6ddb847e13ad79829c3a82c096d9
DIFF: https://github.com/llvm/llvm-project/commit/57d17795b9eb6ddb847e13ad79829c3a82c096d9.diff

LOG: [Test] Add one more test for patch [SLP]Improve reductions analysis and emission, part 1.

The original patch leads to malformed phis on this test. Make sure
we're safeguarded from its return until it is fixed.

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll b/llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
new file mode 100644
index 0000000000000..b2435b1711d7e
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -slp-vectorizer < %s | FileCheck %s
+; RUN: opt -S -passes=slp-vectorizer < %s | FileCheck %s
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Make sure we do not generate malformed phis not in the beginning of block.
+define void @test() #0 {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    br label [[BB1:%.*]]
+; CHECK:       bb1:
+; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ undef, [[BB1]] ], [ undef, [[BB:%.*]] ]
+; CHECK-NEXT:    [[TMP2:%.*]] = phi i32 [ [[TMP18:%.*]], [[BB1]] ], [ undef, [[BB]] ]
+; CHECK-NEXT:    [[TMP3:%.*]] = mul i32 undef, [[TMP]]
+; CHECK-NEXT:    [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP]]
+; CHECK-NEXT:    [[TMP5:%.*]] = mul i32 [[TMP4]], [[TMP]]
+; CHECK-NEXT:    [[TMP6:%.*]] = mul i32 [[TMP5]], [[TMP]]
+; CHECK-NEXT:    [[TMP7:%.*]] = mul i32 [[TMP6]], [[TMP]]
+; CHECK-NEXT:    [[TMP8:%.*]] = mul i32 [[TMP7]], [[TMP]]
+; CHECK-NEXT:    [[TMP9:%.*]] = mul i32 [[TMP8]], [[TMP]]
+; CHECK-NEXT:    [[TMP10:%.*]] = mul i32 [[TMP9]], [[TMP]]
+; CHECK-NEXT:    [[TMP11:%.*]] = mul i32 [[TMP10]], [[TMP]]
+; CHECK-NEXT:    [[TMP12:%.*]] = mul i32 [[TMP11]], [[TMP]]
+; CHECK-NEXT:    [[TMP13:%.*]] = mul i32 [[TMP12]], [[TMP]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i32 [[TMP13]], [[TMP]]
+; CHECK-NEXT:    [[TMP15:%.*]] = mul i32 [[TMP14]], [[TMP]]
+; CHECK-NEXT:    [[TMP16:%.*]] = mul i32 [[TMP15]], [[TMP]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i32 [[TMP16]], [[TMP]]
+; CHECK-NEXT:    [[TMP18]] = mul i32 [[TMP17]], [[TMP]]
+; CHECK-NEXT:    br label [[BB1]]
+;
+bb:
+  br label %bb1
+
+bb1:                                              ; preds = %bb1, %bb
+  %tmp = phi i32 [ undef, %bb1 ], [ undef, %bb ]
+  %tmp2 = phi i32 [ %tmp18, %bb1 ], [ undef, %bb ]
+  %tmp3 = mul i32 undef, %tmp
+  %tmp4 = mul i32 %tmp3, %tmp
+  %tmp5 = mul i32 %tmp4, %tmp
+  %tmp6 = mul i32 %tmp5, %tmp
+  %tmp7 = mul i32 %tmp6, %tmp
+  %tmp8 = mul i32 %tmp7, %tmp
+  %tmp9 = mul i32 %tmp8, %tmp
+  %tmp10 = mul i32 %tmp9, %tmp
+  %tmp11 = mul i32 %tmp10, %tmp
+  %tmp12 = mul i32 %tmp11, %tmp
+  %tmp13 = mul i32 %tmp12, %tmp
+  %tmp14 = mul i32 %tmp13, %tmp
+  %tmp15 = mul i32 %tmp14, %tmp
+  %tmp16 = mul i32 %tmp15, %tmp
+  %tmp17 = mul i32 %tmp16, %tmp
+  %tmp18 = mul i32 %tmp17, %tmp
+  br label %bb1
+}
+
+
+attributes #0 = { "target-features"="+sse4.1" }