[PATCH] D123577: [MIPS][SelectionDAG] Enable TargetLowering::hasBitTest for masks that fit in ANDI.
LiqinWeng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 19 19:37:29 PDT 2022
Miss_Grape added inline comments.
================
Comment at: llvm/lib/Target/Mips/MipsISelLowering.cpp:1179
+ // We can use ANDI+SLTIU as a bit test. Y contains the bit position.
+ auto *C = dyn_cast<ConstantSDNode>(Y);
+ return C && C->getAPIntValue().ule(14);
----------------
Miss_Grape wrote:
> sdardis wrote:
> > I believe this code would be clearer if it was the likes of:
> >
> >
> > ```
> > if (auto *C = dyn_Cast<ConstantSDNode>(Y))
> > return C->getAPIntValue().ule(14);
> >
> > return false;
> > ```
> >
> > Also, the `14` should be `15` here. `andi` takes a 16-bit immediate.
> >
> >
> This number represents the shift, As shown below
> {F22821521}
>
Sorry, the immediate range of the and instruction of Mips is uimm6 instead of sim16. I have fixed and corrected the test case
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123577/new/
https://reviews.llvm.org/D123577
More information about the llvm-commits
mailing list