[llvm] 4271ae2 - AMDGPU: Remove some unreachable code in WWM pass

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 19 18:04:56 PDT 2022


Author: Matt Arsenault
Date: 2022-04-19T21:04:33-04:00
New Revision: 4271ae22beddac33e7cdb1e48002a82f9e2e5684

URL: https://github.com/llvm/llvm-project/commit/4271ae22beddac33e7cdb1e48002a82f9e2e5684
DIFF: https://github.com/llvm/llvm-project/commit/4271ae22beddac33e7cdb1e48002a82f9e2e5684.diff

LOG: AMDGPU: Remove some unreachable code in WWM pass

Defs must be registers and there's no point to code after
llvm_unreachable.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
index 5676263c85000..5861f83410e2b 100644
--- a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
@@ -88,9 +88,6 @@ FunctionPass *llvm::createSIPreAllocateWWMRegsPass() {
 }
 
 bool SIPreAllocateWWMRegs::processDef(MachineOperand &MO) {
-  if (!MO.isReg())
-    return false;
-
   Register Reg = MO.getReg();
   if (Reg.isPhysical())
     return false;
@@ -114,7 +111,6 @@ bool SIPreAllocateWWMRegs::processDef(MachineOperand &MO) {
   }
 
   llvm_unreachable("physreg not found for WWM expression");
-  return false;
 }
 
 void SIPreAllocateWWMRegs::rewriteRegs(MachineFunction &MF) {


        


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