[PATCH] D123458: [LSR][RISCV] Improve test coverage for LSR in RISC-V
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 18 13:09:02 PDT 2022
craig.topper added inline comments.
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Comment at: llvm/test/CodeGen/RISCV/loop-strength-reduce-add-cheaper-than-mul.ll:74
+; RV64-NEXT: mv a1, s0
+; RV64-NEXT: call __muldi3 at plt
+; RV64-NEXT: addw a0, a0, s2
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Please use the -mattr=+m to avoid this libcall
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Comment at: llvm/test/CodeGen/RISCV/loop-strength-reduce-ivusers.ll:48
+; RV64-NEXT: .LBB0_2: # %bb29.i38
+; RV64-NEXT: # Parent Loop BB0_1 Depth=1
+; RV64-NEXT: # => This Inner Loop Header: Depth=2
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Why is this loop substantially simpler than the RV32 version? I suspect LSR doesn't run on RV64, but that means that LSR is making the RV32 loop worse than we would get without it?
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Comment at: llvm/test/CodeGen/RISCV/loop-strength-reduce-ivusers.ll:57
+bb4: ; preds = %bb4, %entry
+ br i1 true, label %bb5, label %bb4
+
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Are these branch on true needed?
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Comment at: llvm/test/CodeGen/RISCV/loop-strength-reduce-ivusers.ll:74
+ %1 = getelementptr [4 x [21 x double]], [4 x [21 x double]]* null, i32 0, i32 %0, i32 %sfb.314.i ; <double*> [#uses=1]
+ %2 = load double, double* %1, align 8 ; <double> [#uses=0]
+ br i1 false, label %bb30.i41, label %bb33.i47
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This load is dead. This whole test looks overly reduced.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123458/new/
https://reviews.llvm.org/D123458
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