[PATCH] D123910: [HWAsan] Fix the hard code on kernel page size bits

[Xiaodong Liu via Phabricator via llvm-commits]

XiaodongLoong created this revision.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D123910

Files:
  llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp


Index: llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
===================================================================
--- llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -69,6 +69,19 @@
 const char kHwasanShadowMemoryDynamicAddress[] =
     "__hwasan_shadow_memory_dynamic_address";
 
+#ifdef SYS_PAGE_SIZE_4K
+static const uint64_t kPageSizeBits = 12;
+#endif
+#ifdef SYS_PAGE_SIZE_8K
+static const uint64_t kPageSizeBits = 13;
+#endif
+#ifdef SYS_PAGE_SIZE_16K
+static const uint64_t kPageSizeBits = 14;
+#endif
+#ifdef SYS_PAGE_SIZE_64K
+static const uint64_t kPageSizeBits = 16;
+#endif
+
 // Accesses sizes are powers of two: 1, 2, 4, 8, 16.
 static const size_t kNumberOfAccessSizes = 5;
 
@@ -1268,7 +1281,7 @@
     //   https://bugs.llvm.org/show_bug.cgi?id=39030
     // Runtime library makes sure not to use the highest bit.
     Value *WrapMask = IRB.CreateXor(
-        IRB.CreateShl(IRB.CreateAShr(ThreadLong, 56), 12, "", true, true),
+        IRB.CreateShl(IRB.CreateAShr(ThreadLong, 56), kPageSizeBits, "", true, true),
         ConstantInt::get(IntptrTy, (uint64_t)-1));
     Value *ThreadLongNew = IRB.CreateAnd(
         IRB.CreateAdd(ThreadLong, ConstantInt::get(IntptrTy, 8)), WrapMask);


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