[PATCH] D123860: GlobalISel: Relax handling of G_ASSERT_* with source register classes

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 15 09:14:18 PDT 2022


arsenm created this revision.
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The most common situation where G_ASSERT_ZEXT appears for AMDGPU is a
copy from a physical register, which happens to use set the actual
register class on the virtual register. After copy coalescing, the
assert's source operand had a vreg with a set class. The verifier was
strictly rejecting cases where the set class/bank weren't an exact
match. Additionally, RegBankSelect was also expecting a register bank
to be set on the register, not a class.

      

This is much stricter than regular copies so relax this behavior. This
now allows these 2 cases:

      

1. Source register has either class or bank, and the result does not
2. Source register has a register class, and the result is a register with a matching bank.

This should avoid needing some kind of special handling to avoid
violating this constraint when folding copies.


https://reviews.llvm.org/D123860

Files:
  llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-zext.mir
  llvm/test/MachineVerifier/test_g_assert_sext_register_bank_class.mir
  llvm/test/MachineVerifier/test_g_assert_zext_register_bank_class.mir

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